Functional Architecture
Intel
®
Server Board S5500BC TPS
Intel order number: E42249-003
Revision 1.0
26
The minimal memory population possible is DIMM_A1. In this configuration, the system
operates in Independent Channel Mode. No RAS is possible.
The minimal memory population for Channel Mirroring Mode is {A1, B1}.
Memory population on channel A and channel B of socket 1 should be identical to
enable Channel Mirroring Mode. channel D and channel E of socket 2 should also be
identical.
If the DDR3 DIMMs on adjacent channels of a socket are not identical in mirroring, the
DIMMs on the higher slots are disabled.
DIMM parameters and matching requirements for memory RAS are specific to each
socket.
When one socket fails the DIMM matching on the adjacent channels for the RAS
configuration selected in Setup, the BIOS configures all DDR3 Channels to
Independent mode.
DDR3 DIMMs on the same channel but adjacent slots do not need to be identical.
3.2.4
Support for Mixed-speed Memory Modules
The BIOS supports memory modules of mixed speed by automatically selecting the highest
common frequency of all DDR3 DIMMs.
3.2.5
CPU Cores, QPI Links and DDR3 Channels Frequency Configuration
The Intel
®
Xeon
®
processor 5500 series connects to each other and to the Intel
®
IOH 5500
chipset through Intel
®
Quick Path Interconnect technology. The frequencies of the processor
cores and the links to the Intel
®
Xeon
®
processor 5500 series are independent from each other.
Unlike the front side bus (FSB) of earlier products, there are no gear-ratio requirements for the
Intel
®
Xeon
®
processor 5500 series.
Intel
®
IOH 5500 chipset will support 4.8 GT/s, 5.86 GT/s, and 6.4 GT/s frequencies for the Intel
®
Quick Path Interconnect links on this server board. During Initialization, the BIOS will configure
both end points of each link to the same speeds for correct operation.
During memory initialization, the BIOS keeps track of the latency requirements of each installed
DDR3 DIMM by recording the requirements from each DIMMs SPD data. The BIOS then
reviews the requirements of all components and configures the memory system and DDR3
DIMMs for a common frequency.
3.2.6
Memory RAS Features
The Intel
®
server boards S5500BC supports the following memory RAS features:
Channel Independent Mode
Channel Mirroring Mode
Demand and Patrol Scrub
Lockstep Channel Mode