Errata
56
Intel
®
Core™2 Extreme Quad-Core Processor QX6000
Δ
Sequence and Intel
®
Core™2 Quad Processor Q6000
Δ
Sequence
Specification Update
and adjust the CPU_CLK_UNHALTED.REF event count to the maximum
resolved boot frequency using this ratio.
Status:
For the steppings affected, see the Summary Tables of Changes.
AK102.
Performance Monitoring Event BR_INST_RETIRED May Count CPUID
Instructions as Branches
Problem:
Performance monitoring event BR_INST_RETIRED (C4H) counts retired
branch instructions. Due to this erratum, two of its sub-events mistakenly
count for CPUID instructions as well. Those sub events are:
BR_INST_RETIRED.PRED_NOT_TAKEN (Umask 01H) and
BR_INST_RETIRED.ANY (Umask 00H).
Implication:
The count value returned by the performance monitoring event
BR_INST_RETIRED.PRED_NOT_TAKEN or BR_INST_RETIRED.ANY may be
higher than expected. The extent of over counting depends on the occurrence
of CPUID instructions, while the counter is active.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
AK103.
Performance Monitoring Event MISALIGN_MEM_REF May Over Count
Problem:
Performance monitoring event MISALIGN_MEM_REF (05H) is used to count
the number of memory accesses that cross an 8-byte boundary and are
blocked until retirement. Due to this erratum, the performance monitoring
event MISALIGN_MEM_REF also counts other memory accesses.
Implication:
The performance monitoring event MISALIGN_MEM_REF may over count. The
extent of over counting depends on the number of memory accesses retiring
while the counter is active.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
AK104.
A REP STOS/MOVS to a MONITOR/MWAIT Address Range May
Prevent Triggering of the Monitoring Hardware
Problem:
The MONITOR instruction is used to arm the address monitoring hardware for
the subsequent MWAIT instruction. The hardware is triggered on subsequent
memory store operations to the monitored address range. Due to this
erratum, REP STOS/MOVS fast string operations to the monitored address
range may prevent the actual triggering store to be propagated to the
monitoring hardware.
Implication:
A logical processor executing an MWAIT instruction may not immediately
continue program execution if a REP STOS/MOVS targets the monitored
address range.
Workaround:
Software can avoid this erratum by not using REP STOS/MOVS store
operations within the monitored address range.
