Errata
Intel
®
Core™2 Extreme Quad-Core Processor QX6000
Δ
Sequence and
25
Intel
®
Core™2 Quad Processor Q6000
Δ
Sequence
Specification Update
Implication:
Software may observe an unexpected thermal interrupt occur after
reprogramming the thermal threshold.
Workaround:
In the ACPI/OS implement a workaround by temporarily disabling the DTS
threshold interrupt before updating the DTS threshold value.
Status:
For the steppings affected, see the Summary Tables of Changes.
AK13.
Count Value for Performance-Monitoring Counter PMH_PAGE_WALK
May be Incorrect
Problem:
Performance-Monitoring Counter PMH_PAGE_WALK is used to count the
number of page walks resulting from Data Translation Look-Aside Buffer
(DTLB) and Instruction Translation Look-Aside (ITLB) misses. Under certain
conditions, this counter may be incorrect.
Implication:
There may be small errors in the accuracy of the counter.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
AK14.
LER MSRs May be Incorrectly Updated
Problem:
The LER (Last Exception Record) MSRs, MSR_LER_FROM_LIP
(1DDH) and MSR_LER_TO_LIP (1DEH) may contain incorrect values after any
of the following:
•
Either STPCLK#, NMI (NonMaskable Interrupt) or external interrupts
•
CMP or TEST instructions with an uncacheable memory operand followed by a
conditional jump
•
STI/POP SS/MOV SS instructions followed by CMP or TEST instructions
and then by a conditional jump
Implication:
When the conditions for this erratum occur, the value of the LER MSRs may
be incorrectly updated.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
AK15.
Performance Monitoring Events for Retired Instructions (C0H) May
Not Be Accurate
Problem:
The INST_RETIRED performance monitor may miscount retired instructions
as follows:
•
Repeat string and repeat I/O operations are not counted when a hardware
interrupt is received during or after the last iteration of the repeat flow.
•
VMLAUNCH and VMRESUME instructions are not counted.
•
HLT and MWAIT instructions are not counted. The following instructions, if
executed during HLT or MWAIT events, are also not counted:
