Intel 440GX, Design Manual

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Intel
®
440GX AGPset Design Guide 3-19
Design Checklist
SMBCLK,
SMBDATA
Connect to all devices on SMBus. 2.7K ohm pull-up to VCC3. This value may
need to be adjusted based on bus loading.
SMEMR#, SMEMW# Connected to ISA slots. 1K ohm pull-up to VCC.
SMI#
430 ohm pull-up to 2.5V. This is an open drain output from PIIX4E. UP:
Connected to CPU. DP: Connected to IOAPIC.
SPKR Connect to speaker circuit.
STOP#
2.7K ohm pull-up to 5V or 10K ohm pull-up to 3V. Connect between 82443GX,
PCI slots, and PIIX4E.
STPCLK#
Connected to CPUs. 430 ohm pull-up to 2.5V. This is an open drain output from
the PIIX4E.
SUSA#
No connect, or connected to CK100 power down control with 10K ohm pull-up
to VCC3.
SUSB# / GPO15 No connect.
SUSC# / GPO16 Controls ATX power supply.
SUSCLK No Connect
SUS_STAT[2:1]# /
GPO[21:20]
No Connect
SYSCLK Connect to LM79 and ISA slots.
TC Connect to SIO and ISA slots.
TEST# 8.2K ohm pull-up to 3VSB.
THERM# / GPI8 Connected to LM75. 8.2K ohm pull-up to VCC3.
TRDY#
2.7K ohm pull-up to 5V or 10K ohm pull-up to 3V. Connect between 82443GX,
PCI slots, and PIIX4E.
USBPx+-
47pF cap to ground with 27 ohm series resistor to USB port. These should be
placed as close as possible to the PIIX4E.
VBAT Connect to battery circuit.
V
REF
Connect to 82443GX and power supply sequencing circuit. See PIIX4E data
sheet.
XDIR# / GPO22 Connect to SIO.
XOE# / GPO23) Connect to SIO.
ZEROWS# Connected to ISA slots. 1K ohm pull-up to VCC.
ZZ / GPO19 No connect.
Table 3-7. PIIX4E Connectivity (Sheet 4 of 4)
Signal Names Connection