Intel 440GX, Design Manual

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Motherboard Layout and Routing Guidelines
2-16 Intel
®
440GX AGPset Design Guide
2.6.2 Signal Quality Measurement
Signal integrity is specified at the processor core, which is not accessible. Intel has found that there
can be substantial miscorrelation between ringback at the edge finger versus the core. The
miscorrelation creates instances where a signal fails to satisfy ringback requirements at the edge
finger, but passes the ringback specification at the core. For this reason, signal integrity is specified
at the core. Ringback guidelines are supplied at the edge finger, as shown in
Table 2-6 . Any
measurement at the edge finger that violates the guidelines should be simulated to verify that it
meets the specification at the core.
NOTE:
1. Ringback specifications follow the methodology described in Intel
®
Pentium

II Processor at 233 MHz, 266
MHz, 300 MHz and 333 MHz
Datasheet.
Table 2-5. System Timing Requirements for Validating Setup/Hold Windows
Driver Receiver Equation
Pentium
®
II
processor
AGPset
AGPset
Pentium
®
II
processor
Pentium
®
II
processor
Pentium
®
II
processor
T T T T T
measured hold skew CLK skew PCB clk
≥ + + +
, , ,max
T T T T T T T T
measured cycle su skew CLK skew PCB jit adj clk
≤ − − − − − +
, , ,min
T T T T T
measured hold skew CLK skew PCB clk
≥ + + −
, , ,min
T T T T T T T T
measured cycle su skew CLK skew PCB jit adj clk
≤ − − − − − −
, , ,max
T T T T
measured hold skew CLK skew PCB
≥ + +
, ,
T T T T T T T
measured cycle su skew CLK skew PCB jit adj
≤ − − − − −
, ,
Table 2-6. Ringback Guidelines at the Intel
®
Pentium
®
II Processor Edge Fingers
Edge
Guideline @ Processor Edge
Finger
Spec @ Processor Core
Rising 1.29V 1.12V
1
Falling 0.71V 0.88V