21
ICS1890
Status Register (register 1
[0x01]
)
Status (register 1)
The
ICS1890
status register is a 16-bit read-only register
used to indicate the basic status of the
ICS1890
. It is accessed
via the management interface of the MII. It is initialized during
a power-up or reset to pre-defined default values.
100Base-T4 (bit 15)
This bit is permanently set to a logic zero indicating that the
ICS1890
is not able to support 100Base-T4 operation.
100Base-X Full Duplex (bit 14)
This bit defaults to a logic one indicating that the
ICS1890
is able to support 100Base-X Full Duplex operation.
100Base-X Half Duplex (bit 13)
This bit defaults to a logic one indicating that the
ICS1890
is able to support 100Base-X Half Duplex operation.
10 Mbps Full Duplex (bit 12)
This bit defaults to a logic one indicating that the
ICS1890
is able to support 10Base-T Full Duplex operation.
10 Mbps Half Duplex (bit 11)
This bit defaults to a logic
one indicating that the
ICS1890
is able to support 10Base-T
Half Duplex operation.
Reserved (Bits 10 through 7)
These bits are reserved for future IEEE standards. When read,
logic zeroes are returned. Writing has no effect on
ICS1890
operation. These bits may, however, be set using the Command
Override mechanism. This should only be done in accordance
with the IEEE 802.3 standard.
MF Preamble Suppression (bit 6)
This bit is permanently set to a logic zero indicating that the
ICS1890
is not able to support management frames not
preceded by a normal size preamble.
Bit
Definition
When bit=0
When bit=1
Access
Default
Hex
15
100Base-T4
always 0
RO
0
7
14
100Base-TX Full Duplex
TX full duplex not
supported
TX full duplex supported
CW
1
13
100Base-TX Half Duplex
TX half duplex not
supported
TX half duplex supported
CW
1
12
10Base-T Full Duplex
10 full duplex not
supported
10 full duplex supported
CW
1
11
10Base-T Half Duplex
10 half duplex not
supported
10 half duplex supported
CW
1
8
10
Reserved by IEEE
CW
0
9
Reserved by IEEE
CW
0
8
Reserved by IEEE
CW
0
7
Reserved by IEEE
CW
0
0
6
MF Preamble Suppression
Frames must have
preamble
RO
0
5
Auto-Negotiation
Complete
Auto-Negotiation in
process
Auto-Negotiation
completed
RO
0
4
Remote Fault
no fault detected
partner indicated a fault
RO /LH
0
3
Auto-Negotiation Ability
PHY is not able to Auto-
Negotiate
PHY is able to Auto-
Negotiate
RO
1
9
2
Link Status
link is not valid
link is valid
RO /LL
0
1
Jabber Detect
no jabber detected
jabber detected
RO /LH
0
0
Extended Capability
always 1
RO
1
Summary of Contents for PHYceiver ICS1890
Page 49: ...49 ICS1890 Pin Configuration...