47
ICS1890
* Redefined for other MAC-PHY interfaces.
Pin Descriptions
PIN
NUMBER
PIN NAME
I/O
TYPE
Description
1
NOD/REP
I
TTL-compatible
Node/Repeater Mode
2
10/100SEL
I/O
TTL-compatible
10/100 Select
3
10TCSR
I
10M Transmit Current Set Resistor
4
100TCSR
I
100M Transmit Current Set Resistor
5
TP_TX
O
Twisted Pair Transmit Data+
6
TP_TX-
O
Twisted Pair Transmit Data-
7
VSS
8
VDD
Ditigal Domain Power (Transmitter)
9
TPTRI
I
TTL-compatible
Twisted Pair Tristate
10
TP_RX+
I
Twisted Pair Receive Data+
11
TP_RX-
I
Twisted Pair Receive Data-
12
N/C
13
ITCLS~
I
TTL-compatible
Invert Transmit Clock Latching Setting
14
N/C
15
N/C
16
VDD
Receive Domain Power (Receiver)
17
VSS
18
VDD
Receive Domain Power (Receiver)
19
MII/SI
I
TTL-compatible
MII Data/Stream Interface
20
REG
I
TTL-compatible
Ground for high order register access
21
LSTA*
O
TTL-compatible
Link Status
22
RESET~
I
TTL-compatible
System Reset
23
HW/SW
I
TTL-compatible
Hardware/Software Priority
24
DPXSEL
I/O
TTL-compatible
Duplex Select
25
VDD
Receive Domain Power (RPLL)
26
N/C
27
LOCK
O
TTL-compatible
Cipher Lock
28
10/LP
I
TTL-compatible
10M Serial/Link Pulse Interface
29
VSS
30
MDIO
I/O
TTL-compatible
Management Data Input/Output
31
MDC
I
TTL-compatible
Management Data Clock
32
RXD3*
O
TTL-compatible
Receive Data 3
Summary of Contents for PHYceiver ICS1890
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