18
ICS1890
Register Access Rules
RO
-
Read Only, writes ignored
CW
-
Command Override Writable
RW/0
-
Read/Write only logic zero
RW
-
Read/Write
Four types of register access are supported by the device.
Read Only (RO) bits may be read, but writes are ignored.
Command Override Writable (CW) bits may be read, but writes
are ignored unless preceded by writing a logic one to the
Command Register Override bit (16:15). Read Write Zero (RW/
0) bits may be read, but must only be written with a logic zero
value. Writing a logic one to this type of bit may prevent the
device from operating normally. Read Write (RW) bits may be
read and may be written to any value.
Default Values
-
-
No default value
0
-
Default to logic zero
1
-
Default to logic one
Pin
-
Default depends on the state of the
name
named pin
Modifier
SC
-
Self Clearing
LL
-
Latching Low
LH
-
Latching High
Self clearing bits will clear without any further writes after a
specified amount of time. Latching bits are used to capture an
event. To obtain the current status of a latching bit, the bit
must be read twice in succession. If the special condition still
persists, the bit will be the same on the second read; otherwise,
the condition indication will not be present.
Summary of Contents for PHYceiver ICS1890
Page 49: ...49 ICS1890 Pin Configuration...