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HT66FM5440
Brushless DC Motor A/D Flash MCU
HT66FM5440
Brushless DC Motor A/D Flash MCU
Extended Instruction Definition
The extended instructions are used to directly access the data stored in any data memory sections.
LADC A,[m]
Add Data Memory to ACC with Carry
Description
The contents of the specified Data Memory, Accumulator and the carry flag are added.
The result is stored in the Accumulator.
Operation
ACC ← ACC + [m] + C
Affected flag(s)
OV, Z, AC, C, SC
LADCM A,[m]
Add ACC to Data Memory with Carry
Description
The contents of the specified Data Memory, Accumulator and the carry flag are added.
The result is stored in the specified Data Memory.
Operation
[m] ← ACC + [m] + C
Affected flag(s)
OV, Z, AC, C, SC
LADD A,[m]
Add Data Memory to ACC
Description
The contents of the specified Data Memory and the Accumulator are added.
The result is stored in the Accumulator.
Operation
ACC ← ACC + [m]
Affected flag(s)
OV, Z, AC, C, SC
LADDM A,[m]
Add ACC to Data Memory
Description
The contents of the specified Data Memory and the Accumulator are added.
The result is stored in the specified Data Memory.
Operation
[m] ← ACC + [m]
Affected flag(s)
OV, Z, AC, C, SC
LAND A,[m]
Logical AND Data Memory to ACC
Description
Data in the Accumulator and the specified Data Memory perform a bitwise logical AND
operation. The result is stored in the Accumulator.
Operation
ACC ← ACC ″AND″ [m]
Affected flag(s)
Z
LANDM A,[m]
Logical AND ACC to Data Memory
Description
Data in the specified Data Memory and the Accumulator perform a bitwise logical AND
operation. The result is stored in the Data Memory.
Operation
[m] ← ACC ″AND″ [m]
Affected flag(s)
Z
LCLR [m]
Clear Data Memory
Description
Each bit of the specified Data Memory is cleared to 0.
Operation
[m] ← 00H
Affected flag(s)
None
LCLR [m].i
Clear bit of Data Memory
Description
Bit i of the specified Data Memory is cleared to 0.
Operation
[m].i ← 0
Affected flag(s)
None