Rev. 1.00
��
��ne ��� �01�
Rev. 1.00
�3
��ne ��� �01�
HT66FM5440
Brushless DC Motor A/D Flash MCU
HT66FM5440
Brushless DC Motor A/D Flash MCU
The accompanying diagram illustrates the addressing data flow of the look-up table.
Last Page or
TBHP Register
TBLP Register
Program Memory
Register TBLH
User Selected
Register
Address
Data
16 bits
High Byte
Low Byte
Table Program Example
The following example shows how the table pointer and table data is defined and retrieved from the
microcontroller. This example uses raw table data located in the Program Memory which is stored
there using the ORG statement. The value at this ORG statement is "0F00H" which refers to the start
address of the last page within the 4K words Program Memory of the device. The table pointer low
byte register is setup here to have an initial value of "06H". This will ensure that the first data read
from the data table will be at the Program Memory address "0F06H" or 6 locations after the start of
the last page. Note that the value for the table pointer is referenced to the specific address pointed by
the TBLP and TBHP registers if the "TABRD [m]" or "LTABRD [m]" instruction is being used. The
high byte of the table data which in this case is equal to zero will be transferred to the TBLH register
automatically when the "TABRD [m]" or "LTABRD [m]" instruction is executed.
Because the TBLH register is a read/write register and can be restored, care should be taken
to ensure its protection if both the main routine and Interrupt Service Routine use table read
instructions. If using the table read instructions, the Interrupt Service Routines may change the
value of the TBLH and subsequently cause errors if used again by the main routine. As a rule it is
recommended that simultaneous use of the table read instructions should be avoided. However, in
situations where simultaneous use cannot be avoided, the interrupts should be disabled prior to the
execution of any main routine table-read instructions. Note that all table related instructions require
two instruction cycles to complete their operation.
Table Read Program Example
tempreg1 db?
; temporary register #1
tempreg2 db?
; temporary register #2
:
mov a,06h ; initialise low table pointer - note that this address is referenced
mov tblp,a ; to the last page or the page that tbhp pointed
mov a,0fh ; initialise high table pointer
mov tbhp,a ; it is not necessary to set tbhp if executing tabrdl or ltabrdl
:
tabrd tempreg1 ; transfers value in table referenced by table pointer
; data at program memory address "0F06H" transferred to tempreg1 and TBLH
dec tblp ; reduce value of table pointer by one
tabrd tempreg2 ; transfers value in table referenced by table pointer
; data at program memory address "0F05H" transferred to tempreg2 and TBLH
; in this example the data "1AH" is transferred to tempreg1 and data
"0FH"
; to tempreg2 the value "00H" will be transferred to the high byte
;
register
TBLH
:
org 0F00h ; set initial address of last page
dc 00Ah,00Bh,00Ch,00Dh,00Eh,00Fh,01Ah,01Bh
