Holtek HT66FM5440, Manual

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Rev. 1.00 19� ��ne ��� �01� Rev. 1.00 199 ��ne ��� �01�
HT66FM5440
Brushless DC Motor A/D Flash MCU
HT66FM5440
Brushless DC Motor A/D Flash MCU
Mnemonic Description Cycles Flag Affected
Branch
LSZ [m] Skip if Data Memory is zero � Note None
LSZA [m] Skip if Data Memory is zero with data movement to ACC � Note None
LSNZ [m] Skip if Data Memory is not zero � Note None
LSZ [m].i Skip if bit i of Data Memory is zero � Note None
LSNZ [m].i Skip if bit i of Data Memory is not zero � Note None
LSIZ [m] Skip if increment Data Memory is zero � Note None
LSDZ [m] Skip if decrement Data Memory is zero � Note None
LSIZA [m] Skip if increment Data Memory is zero with res�lt in ACC � Note None
LSDZA [m] Skip if decrement Data Memory is zero with res�lt in ACC � Note None
Table Read
LTABRD [m] Read table to TBLH and Data Memory 3 Note None
LTABRDL [m] Read table (last page) to TBLH and Data Memory 3 Note None
LITABRD [m] Increment table pointer TBLP first and Read table to TBLH and Data Memory 3 Note None
LITABRDL [m]
Increment table pointer TBLP first and Read table (last page) to TBLH and
Data Memory
3 Note None
Miscellaneous
LCLR [m] Clear Data Memory � Note None
LSET [m] Set Data Memory � Note None
LSWAP [m] Swap nibbles of Data Memory � Note None
LSWAPA [m] Swap nibbles of Data Memory with res�lt in ACC � None
Note: 1. For these extended skip instructions, if the result of the comparison involves a skip then up to four cycles
are required, if no skip takes place two cycles is required.
2. Any extended instruction which changes the contents of the PCL register will also require three cycles for
execution.