4.3 On-Chip Supporting Modules
The on-chip supporting modules are accessed in three states. The data bus is 8 bits or 16 bits wide.
Figure 4-3 shows the access timing for the on-chip supporting modules. Figure 4-4 shows the pin
states.
Figure 4-3 On-Chip Supporting Module Access Cycle
Bus cycle
T
1
state
T
2
state
Address
Read data
Write data
T
3
state
Internal address
bus
Internal read
signal
Internal data bus
(read access)
Internal write
signal
Internal data bus
(write access)
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