GE Multilin
B90 Low Impedance Bus Differential System
3-37
3 HARDWARE
3.3 DIRECT INPUT/OUTPUT COMMUNICATIONS
3
Modules shipped since January 2012 have status LEDs that indicate the status of the DIP switches, as shown in the follow-
ing figure.
Figure 3–42: STATUS LEDS
The clock configuration LED status is as follows:
•
Flashing green — loop timing mode while receiving a valid data packet
•
Flashing yellow — internal mode while receiving a valid data packet
•
Solid red — (switch to) internal timing mode while not receiving a valid data packet
The link/activity LED status is as follows:
•
Flashing green — FPGA is receiving a valid data packet
•
Solid yellow — FPGA is receiving a "yellow bit" and remains yellow for each "yellow bit"
•
Solid red — FPGA is not receiving a valid packet or the packet received is invalid
Summary of Contents for B90 UR Series
Page 316: ...A 4 B90 Low Impedance Bus Differential System GE Multilin A 1 PARAMETER LISTS APPENDIX A A ...
Page 406: ...B 90 B90 Low Impedance Bus Differential System GE Multilin B 4 MEMORY MAPPING APPENDIX B B ...
Page 436: ...C 30 B90 Low Impedance Bus Differential System GE Multilin C 7 LOGICAL NODES APPENDIX C C ...
Page 446: ...D 10 B90 Low Impedance Bus Differential System GE Multilin D 1 IEC 60870 5 104 APPENDIX D D ...
