Section 1 PLC Specifications
1-16
1-2-5 Memory for inverter communication %MW8.0 to %WM8.543
These are the relays and registers for inverter communication. For details, refer to “Section 3 Inverter Communication”.
1-2 PLC Internal Memory
(16) User ROM status %MW10.298
Address
Name
Description
%MX10.298.0
Built-in flash memory mismatch
This flag is set ON if there is a mismatch in content between the built-in
RAM and the built-in flash memory of this board.
* This flag is set OFF when data is transferred from the built-in RAM to
the built-in flash memory.
%MX10.298.1
User ROM card mismatch
This flag is set ON if there is a mismatch in content between the built-in
RAM of this board and the user ROM card (flash memory) installed there.
* This flag is set OFF when data is transferred from the built-in RAM to
the user ROM card.
%MX10.298.2
|
%MX10.298.15
Not used
(17) Specific announce relay %MW10.299
Address
Name
Description
%MX10.299.0
Enable constant scanning
This flag is set ON when the constant scanning function is used.
%MX10.299.1
Not used
%MX10.299.2
Enable I/O status latch function
This flag is set ON when the I/O status latch function is used.
%MX10.299.3
|
%MX10.299.15
Not used
Address
Name
Description
%MW8.0
Status data 1
In inverter communication mode, the status is stored.
%MW8.1
Status data 2
%MW8.2
|
%MW8.543
Not used
