KIC551
K I C 5 5 1 U s e r M a n u a l
77
© 2 0 2 1 F a s t w e l V e r . 0 0 3
4.2.11.2
Bytes from 1 to 6
– strap signals of PCI Express switchboard
After the signature byte 0 there are six bytes (from 1 to 6) containing the strap signal settings for VLSI
of PCI Express switchboard. To read more about these signals see [1] (Annex G).
4.2.11.3
Byte 7
– Setting the prestart delay timer
The delay is set after supplying power and permitting clock pulses to the backplane. The setting the
delay may be required using special-purpose peripheral modules with an increased initialization time.
Maximum delay time amounts to 54 s, interval
– 426 ms.
Table 4.18
– Setting the values of prestart delay timer (byte 7 of system Program Configuration Unit)
Byte
number
7
Start Up Timer
6
5
4
3
2
1
0
Enable
Byte
function
Timer On/Off
27.3s
13.6s
6.8s
3.4s
1.7s
852ms
426ms
The delay is set in accordance with Table 4.18 by adjusting the relevant bits 6-0. The specified delay
(bits 6-0) is active if bit 7 (Start Up Timer Enable) is reset. Otherwise, the delay is switched off (by default).
4.2.11.4
Bytes from 8 to 12
– setting configuration of front panel LEDs PE1 – PE8
During operation of KIC551 with non-standard backplanes with a unique allocation and bit depth of PCI Express
ports,
for proper display of ports’ activities it is required to reassign the PE1 – PE8 LEDs of the front panel to the
other PCI Express ports (e.g. PCI Express x4 ports, placed on the standard backplane in slots #
4 and #5, in the
customized backplane
can be aggregated into PCI Express x8 port and can be placed in the slot #6).
