Model 5600MSC Master Clock/SPG Manual
Page 3-28
Revision 1.6
OPERATION
3.6.2.3.11.
Enabling Ten Field Pulse
OUTPUT
SYNC 1 OUTPUT
Sync 1 Ten Field
S1 ten field on
S1 ten field off
This menu item allows the user to control whether SMPTE 318M compatible
ten field pulse sequence is inserted on the sync output. This pulse
sequence is commonly used to synchronize the AES audio sample
distribution over ten field of NTSC video.
When set to
S1 ten field off
, the ten field pulse sequence is not inserted.
When set to
S1 ten field on,
a ten field pulse sequence will be embedded if
the
Sync Standard
is set to the
NTSC-M
.
This menu item is only applicable when the
Sync Standard
is set to the
NTSC-M
standards. The menu item will show the message
S1 no pal
10 fld
when the
Sync Standard
is set to the
PAL-B
. The menu item will
show the message
S1 no hd 10 fld
when the
Sync Standard
is set to
one of the high definition video standards.
3.6.2.4. Setting The Phase of the Sync Outputs
The phase of the six sync outputs can be set independent of each other. There are four registers that
are used to set the phase. Figure 3-9 and Figure 3-10 show the default video sync alignment
(V phase = 1, H phase = 1, fine phase = 0.0%) for 59.94 Hz and 50 Hz systems respectively.
1125
1
2
3
1124
1123
1122
4
5
1125/59.94/I Video signal
6
7
525/59.94/I Video signal
750/59.94/P Video signal
1
2
3
4
5
6
7
8
750
749
748
747
746
745
4
5
6
3
2
Figure 3-9: Video Sync Phase Alignment in 59.94 Hz Field Rate Systems
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