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COM Express Carrier Type 2
Design
Guide
VCC_12V power input that falls
below the minimum
specification, a watchdog
timeout, or may be initiated by
the module software.
PCI_RESET#
C23
PCI reset output, active low.
O CMOS
Suspend
WAKE0#
B66
PCI Express wake up signal
I CMOS
The COM Express supports up to two ExpressCard through EXCDx_PERST# and EXCDx_CPPE#
signals.
For information on the supported number and configuration of PCI Express lanes of a specific
COM Express module, see the corresponding user’s
manual or contact an Emerson Application
Engineer.
The PCI_RESET# or CB_RESET# either can be used as PCI Express device reset input.
The signals input and output is from COM Express module view.
3.3
PCIE Feature Support
3.3.1
Polarity Inversion
According to the PCI Express Card Electromechanical Specification, all PCIe devices must support
polarity inversion on each PCIe lane, independent of the other lanes. This means that you can route the
module’s P signal to the corresponding ‘—’ pin on the slot or target device, and the PCIE_TX0-
signal to the corresponding ‘+’ pin. If this makes the layout cleaner, with fewer layer transitions and
better differential pairs, then take advantage of this PCIe feature.
3.3.2
Lane Reversal
PCIe lane reversal is not supported on the COM Express general purpose PCIe lanes according to the
COM Express Specification.
3.4
PCIE Schematic Example
3.4.1
PCIE Reference Clock
The COM Express Specification supports only a PCIe reference clock pair to be brought out of the
module. This clock is a 100 MHz differential pair and is sometimes known as a
hint
clock. The clock
allows the PLL in the target PCIe device to lock faster onto the embedded clock in the PCIe bit stream.
Summary of Contents for COM Express Carrier
Page 1: ...COM Express Carrier Type 2 Design Guide October 2009 Confidential and Proprietary ...
Page 17: ...COM Express Carrier Type 2 Page 17 of 103 Design Guide Figure 1 COM Express Type 2 Connector ...
Page 36: ...Page 36 of 103 COM Express Carrier Type 2 Design Guide Table 5 SDVO Layout Requirement ...