Page 102 of 103
COM Express Carrier Type 2
Design
Guide
Route all traces over continuous planes with no interruptions (ground reference preferred). Avoid
crossing over anti-etch, if at all possible. Crossing over anti-etch (split planes) increases inductance
and radiation levels by forcing a greater loop area.
Route digital power and signal traces over the digital ground plane.
Position the bypassing and decoupling capacitors close to the IC pins with wide traces to reduce
impedance.
21.4.1
PCI Trace Routing Guidelines
Table 34 PCI Trace Routing Guidelines
Suggested trace parameters are shown. Using impedance calculation software is recommended
to determine trace width, distance to reference planes, and pair spacing applicable to your
specific project and PCB materials.
Summary of Contents for COM Express Carrier
Page 1: ...COM Express Carrier Type 2 Design Guide October 2009 Confidential and Proprietary ...
Page 17: ...COM Express Carrier Type 2 Page 17 of 103 Design Guide Figure 1 COM Express Type 2 Connector ...
Page 36: ...Page 36 of 103 COM Express Carrier Type 2 Design Guide Table 5 SDVO Layout Requirement ...