Elan Digital Systems Ltd.
18
HD717 USER’S
GUIDE
Remember that before re-loading the TX 4K FIFO with the next
message to send, the HD717 TX DMA must be disabled. If this is
not done the HD717 will start honouring TX DMA requests as soon
as the FIFO holds data and there is a possibility (at high bit rates)
that the SCC will empty the TX 4K FIFO faster than it is being filled
by the PC. This could lead to a TX Underrun at the SCC causing the
premature termination of the message.
For messages longer than 4096 bytes, the Interrupt Service Routine
in the PC must detect that more data must be loaded to the TX 4K
FIFO (i.e. the next block of the message). It should use the 8086
“REP OUTSB” command to rapidly copy the TX data from its local
buffer to the TX 4K FIFO. The amount of data to copy depends on
the message length remaining, but at most 2048 bytes at a time can
be transferred (remember that the IRQ occurs when the TX 4K FIFO
is less than half full). For even greater efficiency, the ISR can also
inspect the TX 4K FIFO Full, Half Full and Empty flags. This
would allow the ISR to decide to write more data if required in an
attempt to better fill the TX 4K FIFO. If this technique is used
remember that once the initial 2K block has been written by the ISR,
every subsequent byte write must made conditional on the Full flag
being high (else the ISR could write “beyond” full). At high data
rates, this extra flag check could lead to the ISR filling the FIFO
more slowly than it is being emptied by the SCC which could
ultimately lead to a FIFO empty condition and the ISR getting
“stuck” trying to fill an ever emptying FIFO ! In such a case, use
only the single 2K block write and then exit the ISR.
HD717 control / status registers that relate to an SCC TX are listed
below:
REGISTER BIT
FUNCTION
PCR0
MIRQEn: Set to ‘1’ to allow any interrupt
through to the PC
PCR1
IRQInService: Use this bit in the ISR routine
to lock the IRQ state, so indicating that an IRQ
is being serviced by software. Set the bit to ‘1’
to lock the IRQ state as the first action of the
ISR. Return it to ‘0’ as the last action of the
ISR (this may immediately re-activate the IRQ
to the PC).
