Cache Organization — Direct-Mapped Cache
The direct-mapped cache memory is an alternative to associative-
cache memory, which uses a single address comparator for the
memory system and standard RAM cells for the address and data
cells. The direct-mapped cache is based on an idea borrowed from
software called hash coding.
This is a method for simulating an associative memory. In the hash
coding approach, the memory address space is divided into a number
of sets of words with the goal of each set having no more than one word
of most-frequently-used data.
Each direct-mapped cache address has two parts. The first part, called
the cache index field, contains enough bits to specify a block location
within the cache. The second field, called the tag field, contains enough
bits to distinguish one block from other blocks that may be stored at a
particular location.
For example, consider a 64KB direct-mapped cache that contains 16K
32-bit locations and caches 16MB of main memory. The cache index
field must include 14 bits to select one 16K block in the cache, plus 2
bits to select a byte from the 4-byte sub-block. The tag field must be 8
bits wide to identify one of the 256 blocks that can occupy the selected
cache location. Therefore, the system requires 64KB of cache RAM
(16K 4-byte sub-blocks) to hold the data and code and 16K of 8 bit
RAM to hold the tag. The direct-mapped cache organization is shown
as follows.
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Chapter 6: Appendix
Summary of Contents for Apex 386/33
Page 1: ...K E E N 3 3 0 4 33MHz 386 SYSTEM User s Manual...
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Page 31: ...Table 1 7 Power Cord Specifications Chapter 1 System Overview 15...
Page 39: ...Chapter 2 Setting Up Your System...
Page 42: ...Figure 2 1 PEM 3301 Motherboard Layout Chapter 2 Setting Up Your System 3...
Page 51: ...Figure 2 7 Cache Configurations 12 Chapter 2 Setting Up Your System...
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Page 55: ...Figure 2 12 8MB Total Onboard memory 16 Chapter 2 Setting Up Your System...
Page 62: ...Figure 2 17 PEM 3300 Motherboard Layout Chapter 2 Setting Up Your System 23...
Page 71: ...Figure 2 23 Cache Configurations 64KB cache 256KB cache 32 Chapter 2 Setting Up Your System...
Page 72: ...Table 2 12 DRAM Configurations Chapter 2 Setting Up Your System 33...
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Page 144: ...Figure 6 14 Direct Mapped Cache Organization Chapter 6 Appendix 25...
Page 147: ...Figure 6 15 Cache Architecture 28 Chapter 6 Appendix...
Page 151: ...Interrupt Controllers Table 6 9 Interrupt Controllers 32 Chapter 6 Appendix...
Page 163: ...Figure 6 19 Pin Assignments of the 32 bit Memory Expansion Bus 44 Chapter 6 Appendix...
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