2
Hardware Installation
25
Processor Upgrade Information
The system board allows for easy installation of processors. Make
sure all jumpers are set correctly before applying power or you
may damage the processor or system board. Use a needle-nosed
plier to move the jumpers if necessary.
Jumpers JP1, JP3, JP4, JP8, JP10 and JP11 are used to set the
external bus clock of your processor. The clock generator will
determine the external bus clock that must be sent to the
processor through these settings.
After setting these jumpers, an Intel
processor will multiply the
external bus clock by the frequency ratio to become the internal
clock speed. Internal clock speed is the commonly known speed of
Intel processors in the market and is the actual operating clock of
the processor (external bus clock x frequency ratio = internal clock
speed). Cyrix
and AMD
processors use the PR-rating system
which is the overall processor performance rating.
Jumper JP9 is used to set the voltage of your processor. Make sure
these jumpers are set correctly, otherwise your system will hang.
The table below shows the External System Bus Clock of the
processors supported by the system board and their corresponding
PCI Clock and ISA Bus Clock.
Cache Memory
The system board supports 512KB pipeline burst, direct map
write-back cache installed at locations U8 and U9 of the system
board. One SRAM is mounted on location U10 for tag SRAM to
store the cacheable addresses. Refer to the Board Layout section
in this chapter for the locations of the SRAMs and tag SRAM.
Ext. System Bus Clock
60MHz
66MHz
75MHz
PCI CLK
30MHz
33MHz
37.5MHz
ISA Bus CLK
7.5MHz
8.25MHz
9.38MHz
Summary of Contents for 586ITBD
Page 1: ...586ITBD Rev BO0 System Board User s Manual 34220829...
Page 6: ...1 Introduction CHAPTER...
Page 15: ...2 Hardware Installation CHAPTER...
Page 19: ...2 Hardware Installation 19 Board Layout square denotes pin 1...
Page 47: ...3 Award BIOS Setup Utility CHAPTER...
Page 71: ...4 Supported Softwares CHAPTER...
Page 76: ...A DIM and SIM Modules APPENDIX...
Page 79: ...B Memory and I O Maps APPENDIX...
Page 82: ...C System Error Report APPENDIX...
Page 85: ...D Troubleshooting APPENDIX...