System Setup and Configuration
3.1 CPU and Memory Module Order
Figure 3–1 Memory Module Ratchet Handles
Ejector
Handles
MLO-008453
6. Refer to Chapter 4 for information on initialization and acceptance testing.
3.2 General Module Order for Q–Bus Options
The order of the supported Q–bus options in the backplane depends on four
factors:
• Relative use of devices in the system
• Expected performance of each device relative to other devices
• The ability of a device to tolerate delays between bus requests and bus
grants (called delay tolerance or interrupt latency)
• The tendency of a device to prevent other devices farther from the CPU
from accessing the bus
3–4 System Setup and Configuration
