Configurable Machine State
5:4: Programmable address strobe 1 enable (for BDR)
11 = read enabled, write enabled
2: Programmable address strobe 0 ready enable
0 = no ready after address strobe* - not used
1:0: Programmable address strobe 0 enable
00 = read disabled, write disabled* - not used
RXCS:
Console Receiver Control and Status Register
(2014 0080)
---------------------------------------------------------
6: Interrupt enable
0 = disabled*
- polled in console mode
TXCS:
Console Transmitter Control and Status Register (2014 0088)
-----------------------------------------------------------
6: Interrupt enable
0 = disabled*
2: Loopback enable
0 = disabled* - diagnostic use only
0: Break transmit
0 = terminate SPACE condition*
SSCBT:
SSC Bus Time Out Register
(2014 0020)
--------------------------------------
23:0: Bus timeout interval = 4000hex (16.384 ms)
range = 1 to FFFFFF (1 µs to 16.77 sec)
ADS0MAT: Programmable Address Strobe 0 Match Register
(2014 0130)
---------------------------------------------------------
29:2: Match address
0 = disabled* - not used
ADS0MAS: Programmable Address Strobe 0 Mask Register
(2014 0134)
--------------------------------------------------------
29:2: Mask address bits - not used
ADS1MAT: Programmable Address Strobe 1 Match Register
(2014 0140)
---------------------------------------------------------
29:2: Match address = 20084000 (for BDR)
ADS1MAS: Programmable Address Strobe 1 Mask Register
(2014 0144)
--------------------------------------------------------
29:2: Mask address bits = 7C (for BDR)
T1CR:
Programmable Timer 0 Control Register
(2014 0100)
--------------------------------------------------
6: Interrupt enable
0 = disabled*
2: STP
0 = run after overflow*
0: RUN
0 = counter not running*
(historical)
Configurable Machine State E–9
