Dataman 40PRO, User Manual

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PG4UW
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Settings in dialog General options (menu Options / General options ) of PG4UW in tab
Errors allows to control, how to write the found errors to user specified report file. Also first 45
found errors are written to Log window.
Notes:
Verify operation compares content of the whole chip with the data in the software, therefore it
might happen - in case of incomplete programmed chip - the verification after programming
shows none error, but solo verify operation does not pass.
Verify operation can report errors also in case of protected devices, which have active read
protection of data.
Generally, "whole device" means the device range between Device start and Device end
addresses set in dialog Device / Device options / Operation options. Not all devices have
support to customize Start-End device addresses. Some devices (for example NAND
FLASH) have customizable sector or page count/range, and the "whole device" means
range of device specified by these options.
Device / Program
This command executes device programming. The control program reports a result of this
action by messages in INFO window and LOG.
The menu command Device / Device options / Operation options of PG4UW allows to
customize areas to be programmed, and set other operation options.
Device / Erase
This command executes device erase. The control program reports a result of this action by
messages in INFO window and LOG.
The menu command Device / Device options / Operation options of PG4UW allows to
customize available operation options.
After Erase, if device (chip) doesn't support erase verify command, the blank check operation
takes place to verify successfulness of Erase operation.
Device / Test
This command executes a test of device selected from list of supported devices (for example
static RAM) on programmers, which support this test.
The sRAM test is done in 3 basic steps:
Test of data drivers functionality.
Drivers test ... test of D0...D7 signals reaction on CE\, OE\ and WE\:
in first cycle write data 0x55 to the address 0x0 (CE/=L WE/=L OE/=H) and compare with
data read from same address (CE/=L WE/=H OE/=L), data have to be valid.
then other combination control pins (CE/=L WE/=H OE/=H), (CE/=H WE/=H OE/=L)... is
set and data have to be not valid - data bus driver have to be inactive.
sRAM test, basic part.
Programmer here writes random data to sRAM device and then verifies the content.
RAM test, advanced (optional).
"Walking one" and "Walking zero" are common terms, who need explanation can study: