MB95710M Series
MB95770M Series
Document Number: 002-09307 Rev. *D
Page 163 of 172
(Continued)
0
50
200
150
100
I
CCSCR
[
μ
A]
−
50
0
+
50
+
100
+
150
T
A
[
°
C]
I
CCSCR
−
T
A
V
CC
=
3.3 V, F
MPL
=
50 kHz (divided by 2)
Sub-CR clock mode
0
100
50
200
150
1
2
3
4
5
6
7
I
CCSCR
[
μ
A]
V
CC
[V]
I
CCSCR
−
V
CC
T
A
=
+
25
°
C, F
MPL
=
50 kHz (divided by 2)
Sub-CR clock mode
0
2
6
4
10
8
1
2
3
4
5
6
7
I
CCMPLL
[mA]
V
CC
[V]
0
2
4
10
8
6
I
CCMPLL
[mA]
−
50
0
+
50
+
100
+
150
T
A
[
°
C]
I
CCMPLL
−
V
CC
T
A
=
+
25
°
C, F
MP
=
16 MHz (PLL multiplication rate: 4)
Main PLL clock mode
I
CCMPLL
−
T
A
V
CC
=
3.3 V, F
MP
=
16 MHz (PLL multiplication rate: 4)
Main PLL clock mode
0
2
6
4
10
8
1
2
3
4
5
6
7
I
A
[mA]
AV
CC
[V]
I
A
−
AV
CC
T
A
=
+
25
°
C, F
MP
=
16 MHz (divided by 2)
Main clock mode with the external clock operating
0
2
4
10
8
6
I
A
[mA]
−
50
0
+
50
+
100
+
150
T
A
[
°
C]
I
A
−
T
A
V
CC
=
3.3 V, F
MP
=
16 MHz (divided by 2)
Main clock mode with the external clock operating