MB95710M Series
MB95770M Series
Document Number: 002-09307 Rev. *D
Page 110 of 172
19.6.4 Port A operations
• Operation as an output port
• A pin becomes an output port if the bit in the DDRA register corresponding to that pin is set to “1”.
• For a pin shared with other peripheral functions, disable the output of such peripheral functions.
• When a pin is used as an output port, it outputs the value of the PDRA register to external pins.
• If data is written to the PDRA register, the value is stored in the output latch and is output to the pin set as an output
port as it is.
• Reading the PDRA register returns the PDRA register value.
• To use a pin shared with the LCDC as an output port, set a corresponding function select bit in the LCDC enable
register 2 (LCDCE2:COM[7:0]) to “0” to select the general-purpose I/O port function, and then set the port input
control bit in the LCDC enable register 1 (LCDCE1:PICTL) to “1”.
• Operation as an input port
• A pin becomes an input port if the bit in the DDRA register corresponding to that pin is set to “0”.
• For a pin shared with other peripheral functions, disable the output of such peripheral functions.
• If data is written to the PDRA register, the value is stored in the output latch but is not output to the pin set as an
input port.
• Reading the PDRA register returns the pin value. However, if the read-modify-write (RMW) type of instruction is
used to read the PDRA register, the PDRA register value is returned.
• To use a pin shared with the LCDC as an input port, set a corresponding function select bit in the LCDC enable
register 2 (LCDCE2:COM[7:0]) to “0” to select the general-purpose I/O port function, and then set the PICTL bit in
the LCDCE1 register to “1”.
• Operation as an LCDC common output pin
• Set the bit in the DDRA register corresponding to an LCDC common output pin to “0”.
• To use a pin shared with a general-purpose I/O port as an LCDC common output pin, set a corresponding function
select bit in the LCDC enable register 2 (LCDCE2:COM[7:0]) to “1” to select the LCDC common output function,
and then set the PICTL bit in the LCDCE1 register to “1”.
• Operation at reset
If the CPU is reset, all bits in the DDRA register are initialized to “0” and port input is enabled.
• Operation in stop mode and watch mode
• If the pin state setting bit in the standby control register (STBC:SPL) is set to “1” and the device transits to stop
mode or watch mode, the pin is compulsorily made to enter the high impedance state regardless of the DDRA reg-
ister value. The input of that pin is locked to “L” level and blocked in order to prevent leaks due to input open.
• If the pin state setting bit is “0”, the state of the port I/O or that of the peripheral function I/O remains unchanged
and the output level is maintained.
