Cypress MB95710M Series, Manual

Page: 141 / 174

MB95710M Series
MB95770M Series
Document Number: 002-09307 Rev. *D Page 140 of 172
(V
CC
= 1.8 V to 5.5 V, V
SS
= 0.0 V, T
A
=
−
40 °C to
+
85 °C)
Parameter Symbol Pin name Condition
Value
Unit Remarks
Min Typ Max
Clock
frequency
F
MCRPLL
— —
15.68 16 16.32 MHz
Operating conditions
• PLL multiplication rate: 4
• 0
°
C
≤
T
A
≤ +
70
°
C
15.2 16 16.8 MHz
Operating conditions
• PLL multiplication rate: 4
•
−
40
°
C
≤
T
A
<
0
°
C,
+
70
°
C
<
T
A
≤ +
85
°
C
F
MPLL
— — 8 — 16 MHz
When the main PLL clock is
used
F
CL
X0A, X1A ——
— 32.768 — kHz
When the sub-oscillation
circuit is used
— 32.768 — kHz
When the sub-external clock
is used
F
CRL
— — 50 100 150 kHz
When the sub-CR clock is
used
Clock cycle
time
t
HCYL
X0, X1 — 61.5 — 1000 ns
When the main oscillation
circuit is used
X0 — 30.8 — 1000 ns
When an external clock is
used
X0, X1 — — 250 — ns
When the main PLL clock is
used
t
LCYL
X0A, X1A — — 30.5 — µs When the subclock is used
Input clock
pulse width
t
WH1
,
t
WL1
X0 — 12.4 — — ns
When an external clock is
used, the duty ratio should
range between 40% and 60%.
X0, X1 — — 125 — ns
When the main PLL clock is
used
t
WH2
,
t
WL2
X0A — — 15.2 — µs
When an external clock is
used, the duty ratio should
range between 40% and 60%.
Input clock
rising time and
falling time
t
CR
,
t
CF
X0, X0A — — — 5 ns
When an external clock is
used
CR oscillation
start time
t
CRHWK
— — — — 50 µs
When the main CR clock is
used
t
CRLWK
— — — — 30 µs
When the sub-CR clock is
used
PLL oscillation
start time
t
MCRPLLWK
— — — — 100 µs
When the main CR PLL clock
is used