CYALKIT-E02 Solar-Powered BLE Sensor Beacon Reference Design Kit Guide, Doc. No. 002-11317 Rev. *C
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Pin Name:
Description:
ENA_LDO
Connect GND (H: Enable, L: Disable)
LDO output control pin
It is set to disable.
INT
Connect VINT
Event-driven mode control pin
VOUT2 is always active.
5.1.1.1 Solar Cell Specification
for detailed specifications.
5.1.1.2 Diode Connection Between Solar Cell and VDD
Refer to
Diode Connection Between Solar Cell and VDD
5.1.1.3 VBAT Connection (optional)
Refer to
5.1.2 VOUT Setting Block
This section describes the VOUT settings of S6AE103A as shown in the following schematic. The VOUT1 and VOUT2 output
voltage of S6AE103A can be set by changing the resistors connected to the SET_VOUTH and SET_VOUTL pins because the
VOUT upper limit voltage (VVOUTH) and VOUT lower limit voltage (VVOUTL) are set based on the connected resistors. The
SET_VOUTFB pin outputs a reference voltage for setting the VOUT upper limit voltage and VOUT lower limit voltage. The
voltages applied to the SET_VOUTH and SET_VOUTL pins are produced by dividing this reference voltage outside the IC.
The VOUT upper limit voltage (VVOUTH) and VOUT lower limit voltage (VVOUTL) can be calculated using the following
equations:
VOUT upper limit voltage
V
VOUTH
[V] =
57.5 × (R3 + R4)
11.1 × (R2 + R3 + R4)
=
57.5 × (5.6M + 5.6M)
11.1 × (6.8M + 5.6M + 5.6M)
= 3.24 V
VOUT lower limit voltage
V
VOUTL
[V] =
57.5 × R3
11.1 × (R2 + R3 + R4)
=
57.5 × 5.6M
11.1 × (6.8M + 5.6M + 5.6M)
= 1.62 V
5.1.2.1 VOUTL Setting Margin
Refer to
Equivalent Series Resistance of the Supercapacitor
