REGISTERS
Bit 13
SS FLAG - Subsystem Fail.
This bit sets the Subsystem Flag bit in the MIL-STD 1553B Status Word. In the RT Mode, the
Subsystem Fail is also logged into the Message Status Word.
Bit 12
DBC - Dynamic Bus Control Acceptance (RT).
Enabling this bit allows the DTI-VME/S to accept Dynamic Bus Control and to set the
appropriate bit in the MIL-STD-1553B Status Word and the DTI-VME/S Status Register. Host
intervention is required for the DTI-VME/S to take over as BC.
Bit 11
RT FLAG - Terminal Flag (RT).
This bit sets the MIL-STD 1553B Status Word Terminal Flag bit. The bit in the MIL-STD
1553B Status Word is also internally set if the BIT fails
Bit 10
SRQ - Service Request (RT).
This bit sets the Status Word Service Request bit.
Bit 9
BUSY1 - Busy Mode Enable (RT).
This bit sets the Status Word Busy Bit and inhibits all data transfers to the subsystem. The only
possible DMA transfers are for the enabled events logged in the Interrupt Log List.
Bit 8
BC/RT - BC/RT Mode Select.
This bit indicates the internal BCRTSEL signal is set. This is not a useful bit as it does not
reflect the state of the BC/RT Mode Select Bit (Register 00, Bit 10).
Bit 7
LOCK - Change Lock-Out.
Change Lock-Out Enable. When set, this bit prohibits changes to the RT Address or the BC/RT
mode select, using internal registers.
Bit 6
PAR ERR - RT Address Parity Error.
This bit indicates an RT Address Parity Error. It appears after the RT Address is latched, if a
parity error exists.
Bit 5
RTA PAR - RT Address Parity.
This is an odd parity used with the RT Address. It ensures accurate recognition of the RT.
Bits 4-0
RT Address
Modify the RT Address by writing to these bits. Must be written after Reset.
3.12 BIT Start Register 11 (Write Only)
Any write to this register's address initiates the internal BIT routine. This test only checks
internal encoders/decoders and protocol logic.
3.13 Reset Command Register 12 (Write Only)
Any write to this register's address location initiates an immediate reset sequence of the
encoder/decoder and protocol sections of the DTI-VME/S, lasting one microsecond. This
reset is identical to the one used for the RT mode code.
NOTE:
Bit 15 (Bus Monitor Mode Select) of Register 14 is set to OFF after a write to this
register.
Copyright 2004
3-11
DTI-VME/S
Summary of Contents for DTI-VME/S
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