Curtiss-Wright DTI-VME/S, User Manual

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BUS MONITOR
7.1.4 Data Pointer
The 16 bit Data Pointer points to the onboard RAM starting location of the DTI-VME/S's
dual-port RAM, where the data buffer of the current message record block resides. The
number of data words per message record block instruction is 32 or less. You must initialize
the pointer each time you want to use it.
7.1.5 Status Word One
Status Word One contains either an RT Status Response for a BC-to-RT transfer or an RT-
to-BC transfer, a status word of MIL-STD-1553B Mode Code transfer or and RT Transmit
Status for an RT-to-RT transfer.
7.1.6 Status Word Two
The 16 bit Status Word Two contain the receiving status in RT-to-RT transfers. If RT-to-RT
transfers do not occur, the word is not used.
7.1.7 Tail Pointer
The 16 bit tail Pointer contain the onboard RAM starting address of the next sequential
message record block.
7.2 Initializing Data Buffers
If memory is cleared, all data buffers contain 0s.
7.3 Loading Bus Monitor Registers
The Bus Monitor Control Register (14) and the Bus Monitor Terminal Address Select
Registers (16 and 17) control the bus monitor. The loading of these and other registers that
affect the BM is described in the following sections.
7.3.1 Bus Monitor Control Register (14)
Bit 15 of this register enables the BM. Bits 13 and 14 determine if selected RTs or all RTs
respectively are to be monitors. (Bit 15 is used in conjunction with Bit 10 of Register 0
being cleared in RT mode). Bit 15 of Register 14 is cleared by a WRITE to Register 12
(Reset Command Register).
NOTE: If Bit 10 is set (BC mode) and Bit 15 is set, unpredictable results may occur.
7.3.2 Bus Monitor Terminal Address Select Registers (16 and 17)
These registers determine the RTs to be monitored. Bits 0 - 15 of Register 16 select RT
addresses 0 through 15. Bits 0 - 15 of Register 17 select RT addresses 16 through 31.
(These registers are unused when Bit 14 of Register 14 is set to monitor all RTs).
Copyright 2004 7-3 DTI-VME/S