Caen N6724, User Manual

Page: 43 / 61

TRG-IN as Gate
It is possible to configure TRG-IN as a gate for trigger an -veto func on. The common acquisi on trigger
is then issued upon the AND between the external signal on TRG-IN and the other trigger sources but the
so ware trigger (i.e. the so ware trigger cannot par cipate in the Trigger as Gate mode).
This mode is enabled by se ng bit[27] = 1 of register 0x810C and bit[10] = 1 of register 0x811C [RD1] . The
trigger sources par cipa ng in AND with TRG-IN are configurable through register 0x810C as well.
Trigger distribution
As described in Sec. Trigger Management , the OR of all the enabled trigger sources, synchronized with the
internal clock, becomes the common trigger of the board that is fed in parallel to all channels, consequently
causing the capture of an event. By default, only the So ware Trigger and the External Trigger par cipate
in the common acquisi on trigger (refer to the red path on top of Fig.
7.18 ).
SELF-TRG[3:0]
GPO
0x8110
Bits[9:8]
00
01
10
TO THE CHANNELS
COMMON ACQUISITON TRIGGER
0x811C
Bits[17:16]
4
4
00
01
MB PROBES
10
PB PROBES
11
S-IN
4
SW TRG
EXT TRG
MASK 1
0x810C
Bits[3:0]
MASK 4
0x8110
Bits[7:0]
OR
AND
MAJORITY
OR
MASK 2
MASK 3
0x810C
Bits[31:29]
0x8110
Bits[31:29]
EXT TRG
SW TRG
EXT TRG
OR
TRG SOURCES
0x8110
Bits[12:10]
SW TRG
Fig. 7.18: Trigger configura on of TRG-OUT front panel connector.
A Trigger Out signal is also generated on the relevant front panel GPO connector (NIM or TTL), and allows
to extend the trigger signal to other boards. Thanks to its configurability, GPO can propagate out:
- the OR of all the enabled trigger sources (only the So ware Trigger is provided by default, as in the
red path of Fig. 7.18 );
- the OR, AND or MAJORITY exclusively of the channel self-triggers.
The registers involved in the GPO programming are:
- Register address 0x8110;
- Register address 0x811C.
UM3247 - N6724 User Manual rev. 10 43