7 Func onal Descrip on
Analog Input Stage
Input dynamic is 2.25 V
pp
; 0.5 V
pp
and 10 V
pp
versions are available upon request (see Tab.
). In order
to preserve the full dynamic range with unipolar input signal, posi ve or nega ve, it is possible to add a
DC offset by means of a 16 bit DAC, which is up to
±
1.125 V at 2.25 V
pp
±
0.25 V
pp
at 0.5 V
pp
and
±
5.0
V at 10 V
pp
. The input bandwidth ranges from DC to 40 MHz (with 2
nd
order linear phase an -aliasing low
pass filter).
MCX
OpAmp
50
Ω
DAC
Vref
14 bit
ADC
Input
FPGA
+1.125
0
+2.25
-1.125
-2.25
Input Dynamic Range: 2.25 Vpp
Positive Unipolar
DAC = FSR
16 bit
Negative Unipolar
DAC = 0
Bipolar
DAC = FSR/2
+
-
Fig. 7.1:
Analog input diagram
DC Offset Individual Setting
Se ng the DC offset for channel n requires a write access at register addresses 0x1n98
. Wri ng at
0x8098, the DC offset will apply to all channels at once.
20
UM3247 - N6724 User Manual rev. 10
