Broadcom PLX PCI 9052RDK-LITE, Hardware Reference Manual

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Drive AEN (on the ISA connector) using the Chip Select CS3# output, and program the CS3BASE
register value in EEPROM, to assert the Chip Select for the ISA address range(s). Since CS3# and
USER3 signals are multiplexed onto the same pin 141, with USER3 being the PCI 9052 default
configuration, CS3# functionality must be enabled by setting the CNTRL[9] bit value in EEPROM to 1. PCI
9052RDK-Lite default EEPROM values enable CS3#.
On the RDK, cut the short trace connecting AEN (ISA connector pin A11) to a via (ground). Solder a wire
to connect CS3# (at JP2-13) to ISA connector pin A11. Remove any jumper connecting CS3# (JP2-13) to
either CSROM# (JP2-14) or CSRAM# (JP2-10).
The RDK default configuration maps CS3# to the ROM socket, with CS3BASE programmed for a 1 MB
range starting at Local address 2000000h. If only one of ISA memory (Space 0) or ISA I/O (Space 1) is
used, the CS3BASE register can be programmed with the same value used in the CS0BASE or
CS1BASE register. If both ISA memory and ISA I/O are used, CS3# can be programmed to include both
Spaces by setting the encoded Range to a high enough power of 2, and the Base Address to a low
enough multiple (such as 0) of that range, to include all Local Bus addresses used for both Spaces 0 and
1.
PCI 9052RDK-LITE Hardware Reference Manual v1.3
© 2004 PLX Technology, Inc. All rights reserved . 19