Broadcom PLX PCI 9052RDK-LITE, Hardware Reference Manual

Page: 5 / 39

P
REFACE
N
OTICE
This document contains PLX Confidential and Proprietary information. The contents of this document may
not be copied nor duplicated in any form, in whole or in part, without prior written consent from PLX
Technology, Inc.
PLX provides the information and data included in this document for your benefit, but it is not possible to
entirely verify and test all the information, in all circumstances, particularly information relating to non-PLX
manufactured products. PLX makes neither warranty nor representation relating to the quality, content, or
adequacy of this information. The information in this document is subject to change without notice.
Although every effort has been made to ensure the accuracy of this manual, PLX shall not be liable for
any errors, incidental, or consequential damages in connection with the furnishing, performance, or use of
this manual or examples herein. PLX assumes no responsibility for damage or loss resulting from the use
of this manual, for loss or claims by third parties, which may arise through the use of the RDK, or for any
damage or loss caused by deletion of data as a result of malfunction or repair.
A
BOUT
T
HIS
M
ANUAL
This document describes the PLX PCI 9052RDK-LITE, a Rapid Development Kit, from a hardware
perspective. It contains a description of all major functional circuit blocks on the board and also is a
reference for the creation of software for this product. This manual also includes complete schematics
and bill of materials.
R
EVISION
H
ISTORY
Date Version Comments
June 2001 0.50 Yellow Book initial release.
November 2001 1.0 Hardware Reference Manual release
June 2002 1.1
Section 2.2: Clarified PCI 9052 feature set. Table 3-2: Changed offset
28h register value description and clarified offset 5Ch register value
description. Section 3.4.1: Added exceptions to ISA compatibility.
Section 4.1.2: Clarified how to enable a local address space. Section
4.2.4.1: Changed LASxBRD register settings for 8-bit and 16-bit ISA
operation. Section 4.2.4.2: Added CNTRL[18] value for PCI v2.1
compatible systems. Section 4.2.5: Added recommendation that
disabled LINTix pins should not be left floating. Section 6: Updated BOM
and changed schematic to reflect BOM update.
March 2003 1.2 Updated Schematic and Bill of Materials.
October 2004 1.3
Add Notes 2 and 3 at Table 3-4 Configuration Jumper Settings.
Add Note to Section 1.2 RDK Installation. Update Bill of Materials.
Add Section 4.4, ISA Interface AEN Signal
PCI 9052RDK-LITE Hardware Reference Manual v1.3
© 2004 PLX Technology, Inc. All rights reserved.
iii