Basler A102K, User Manual, Page: 59 / 133

Operation and Features
BASLER A102
k
3-23
DRAFT
Shift Twice
When the camera is set to shift twice, the output
from the camera will include bit 9 through bit 0
from the ADC.
The result of shifting twice is that the output of the
camera is effectively multiplied by four. For
example, assume that the camera is set for no
shift, that it is viewing a uniform white target, and
that under these conditions the reading for the
brightest pixel is 100. If you changed the digital
shift setting to shift twice, the reading would
increase to 400.
Shift Three Times
When the camera is set to shift three times,
the output from the camera will include bit 8
through bit 0 from the ADC along with a zero
as an LSB.
The result of shifting three times is that the
output of the camera is effectively multiplied
by eight. For example, assume that the
camera is set for no shift, that it is viewing a
uniform white target, and that under these
conditions the reading for the brightest pixel
is 100. If you changed the digital shift setting
to shift three times, the reading would
increase to 800.
L
Note that if bit 11 or bit 10 is set to 1, all of the other bits will automatically be set to
1. This means that you should only use the shift twice setting when your pixel read-
ings in 10 bit mode with no digital shift are all below 256.
L
Note that if bit 11, bit 10 or bit 9 is set to 1, all of the other bits will automatically be
set to 1. This means that you should only use the shift three times setting when your
pixel readings in 10 bit mode with no digital shift are all below 128.
Since the shift three times setting requires that the least significant bit (LSB) always
be “0“, no odd gray values can be output. The gray value scale will only include gray
values of 2, 4, 6 and so forth. The absence of some gray values is commonly called
“Missing Codes“.
bit
9
bit
8
bit
7
bit
6
bit
5
bit
4
bit
3
bit
2
bit
1
bit
0
ADC
bit
11
bit
10
M
S
B
L
S
B
Shifted Twice
bit
9
bit
8
bit
7
bit
6
bit
5
bit
4
bit
3
bit
2
bit
1
bit
0
ADC
bit
11 bit
10
M
S
B
L
S
B
Shifted 3 Times
“0”