AT90S8414
Preliminary
4-55
Bit 5 - UDRIE : UART Data Register Empty Interrupt Enable:
When this bit is set (one), a setting of the UDRE bit in USR will cause the UART Data Register Empty interrupt routine
to be executed provided that global interrupts are enabled.
Bit 4 - RXEN : Receiver Enable:
This bit enables the UART receiver when set (one). When the receiver is disabled, the TXC, OR and FE status flags
cannot become set. If these flags are set, turning off RXEN does not cause them to be cleared.
Bit 3 - TXEN : Transmitter Enable:
This bit enables the UART transmitter when set (one). When disabling the transmitter while transmitting a character, the
transmitter is not disabled before the character in the shift register plus any following character in UDR has been
completely transmitted.
Bit 2 - CHR9 : 9 Bit Characters:When this bit is set (one) transmitted and received characters are 9 bit long plus start
and stop bits. The 9
th
bit is read and written by using the RXB8 and TXB8 bits in UCR, respectively. The 9
th
data bit can
be used as an extra stop bit or a parity bit.
Bit 1 - RXB8 : Receive Data Bit 8
When CHR9 is set (one), RXB8 is the 9
th
data bit of the received character.
Bit 0 - TXB8 : Transmit Data Bit 8
When CHR9 is set (one), TXB8 is the 9
th
data bit in the character to be transmitted.
THE BAUD RATE GENERATOR
The baud rate generator is a frequency divider which generates baud-rates according to the following equation:
BAUD =
f
16(UBRR
1)
ck
+
·
BAUD =
Baud-Rate
·
f
ck
= Crystal Clock frequency
·
UBRR
= Contents of the UART Baud Rate register, UBRR (0-255)
For standard crystal frequencies, the most commonly used baud rates can be generated by using the UBRR settings in
Table 14. UBRR values which yield an actual baud rate differing less than 2% from the target baud rate, are bolded in the
table.
