AT90S8414
Preliminary
4-37
Figure 33: Timer/Counter1 Block Diagram
The 16-bit Timer/Counter1 can select clock source from CK, prescaled CK, or an external pin. In addition it can be
stopped as described in the specification for the Timer/Counter1 Control Register - TCCR1B. The different status flags
(overflow, compare match and capture event) and control signals are found in the Timer/Counter1 Control Registers -
TCCR1A and TCCR1B. The interrupt enable/disable settings for Timer/Counter1 are found in the Timer/Counter
Interrupt Mask Register - TIMSK.
When Timer/Counter1 is externally clocked, the external signal is synchronized with the oscillator frequency of the CPU.
To assure proper sampling of the external clock, the minimum time for the external clock being low and high must be at
least one internal CPU clock period. The external clock signal is sampled on the rising edge of the internal CPU clock.
The 16-bit Timer/Counter1 features both a high resolution and a high accuracy usage with the lower prescaling
opportunities. Similarly, the high prescaling opportunities makes the Timer/Counter1 useful for lower speed functions or
exact timing functions with infrequent actions.
The Timer/Counter1 supports two Output Compare functions using the Output Compare Register 1 A and B - OCR1A
and OCR1B as the data sources to be compared to the Timer/Counter1 contents. The Output Compare functions include
optional clearing of the counter on compareA match, and actions on the Output Compare pins on both compare matches.
