
BERT Technical Articles
B-26
GB1400 User Manual
To stress the noise margin continuously, the tester alternates between 10001000 (pattern A) and
11101110 (pattern B) at a frequency below the AC coupling circuit’s cutoff frequency. Each pattern
continues long enough for the circuit’s transient to die out. A duration of 3.14 time constants, or
π
RC, is
sufficient. Therefore, the complete fixed pattern stored in memory has a period of at least 2
π
RC. The
frequency of the pattern is at most 1/2
π
RC, which is the cutoff frequency, f
L
, of the coupling circuit.
Then if the bit rate is f
c
, the number of bits in the fixed pattern is:
N
≥
f
c
/ f
L
For example, if f
l
=32kHz and f
c
=1 Gbit/s, the fixed data pattern must be at least N = 1 Gbit/s/ 32kHz =
31,200 bits long.
Users can create different stress levels by combining the above patterns with patterns that have an equal
number of 1s and 0s, thus causing no stress in a system with AC coupling. For example, the pattern
11001100 won’t change the DC content or noise margin. By combining various amounts of this balanced
pattern with the previous unbalanced patterns, users can stress the system to varying degrees, up to 50%
(see table below).
Table 1. Data patterns for noise margin stressing
Pattern A
Pattern B
Margin reduction
1100110011001100
1100110011001100
0 %
1000110011001100
1110110011001100
12.5 %
1000110010001100
1110110011101100
25.0 %
1000100010001000
1110111011101110
50.0%
Other patterns such as 1000000010000000, stress the noise margin by more than 50%, but they also stress
the clock-recovery circuit, which may be undesirable.
Users who want to stress the clock-recovery circuit can do so by varying the transition density. This is
because the system’s receiver gets its information from the received data signal. For nonreturn-to-zero
data, the clock information is in the data transitions. Random data contains an equal number of 0-to-1 and
1-to-0 transitions, and a clock-recovery circuit is usually designed to expect this 50% transitions density.
The circuit may have trouble with either a greater or lesser density.
Summary of Contents for gigaBERT1400
Page 16: ...Preface GB1400 User Manual xvi ...
Page 17: ...Getting Started ...
Page 26: ...Operating Basics ...
Page 66: ...Application Note Auto Search Synchronization 2 40 GB1400 User Manual ...
Page 76: ...Application Example 2 50 GB1400 User Manual ...
Page 77: ...Reference ...
Page 163: ...Reference 3 86 GB1400 User Manual ...
Page 164: ...Appendices ...
Page 174: ...Specifications A 10 GB1400 User Manual ...
Page 194: ...BERT Technical Articles B 20 GB1400 User Manual ...
Page 320: ...Remote Commands C 102 GB1400 User Manual ...
Page 332: ...Using GPIB RS 232 D 12 GB1400 User Manual ...
Page 341: ...Performance Verification GB1400 Acceptance Test E 9 ...
Page 349: ...Default Settings F 6 GB1400 User Manual MISC View Angle 0 Panel Lock OFF Response Header ON ...
Page 351: ...Cleaning Instructions G 2 GB1400 User Manual ...
Page 368: ...Glossary Index ...