INDEX
Copyright 2001
INDEX-1
DAC128V HARDWARE REFERENCE
A
address detector circuitry ...............................C-2
analog output voltage .....................................B-1
automatic test equipment................B-1, B-2, B-3
B
base address............................................C-3, C-4
backplane........................................................ 2-1
binary coding.................................................. 2-2
buffers ........................2-2, 2-5, 2-7, 2-8, 2-9, 4-2
analog ......................................................... 2-9
bus time-out error...................................C-1, C-2
C
carrier board ............................ 1-1, 2-1, 2-2, 2-4,
2-6, 2-8, 2-9, 3-1, 3-2, 3-3, 4-1, 4-2, 4-8, A-2,
B-1, C-1, C-2
cleaning ........................................................ 2-10
configuration .....................2-7, 2-8, 4-1, 4-6, B-1
connector ........................... 2-2, 2-5, 2-6, 2-9, 3-2
converters ............................................... 2-4, C-1
D
data bus contention......................................... 4-2
data register ............................A-1, C-1, C-2, C-5
data sources .................................................... 2-2
device driver routines..................................... 2-2
DMA activity................................................. A-1
E
Electrostatic Sensitive Device........................ 3-1
emulation................................................ 2-6, C-1
EPLD Altera device .........................2-2, 2-5, 2-6
external power source ..................... 2-8, 2-9, B-1
F
falling edge..................................................... 4-9
I
I/O address map..............................................C-2
I/O connector........................... 2-2, 2-3, 2-4, 2-5,
2-8, 2-9, 3-2, 3-5, B-1
I/O read................................................... 2-6, A-1
I/O write ......................................................... 4-2
ID address space.............................................C-1
ID PROM ............................................... 2-6, C-1
ID read.................................................... 2-6, C-1
ID write ......................................................... A-1
IP Module................................ 1-1, 1-2, 2-1, 2-2,
2-4, 2-5, 2-6, 3-1, 3-2, 3-3, 3-4, 3-5, 4-1, 4-2,
A-1, B-1, C-1, C-2, C-3, C-4
L
line replaceable units .....................................B-1
M
manual..................................... 1-1, 3-1, B-1, C-1
MTBF.............................................................A-2
O
output voltage buffer.......................................2-4
P
pin assignments...............................................3-2
power supply.....................2-4, 2-5, 2-8, 2-9, B-3
power up ................................. 2-2, 2-5, C-1, C-5
R
read-back gating..............................................2-4
reference circuitry...........................................2-9
register ..............................2-2, 2-4, 2-7, 4-2, C-5
rising edge.......................................................4-2
S
singlewide .......................................................2-1
slew time ............................................... 4-9, 4-10
specifications ........................................ 2-9, 2-10
T
temperature ...................................... 2-8, 2-9, 4-8
timing measurements ......................................4-1
transceivers ............................................. 2-5, 2-6
V
voltage generator.............................................2-5
voltage levels ..................................................2-7
voltage output ranges ......................................2-7
voltage ranges ...........................2-1, 2-5, 2-7, 4-3
Z
zener................................................................2-8
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