program (CS6 to CS3). When one or more of these chip selects is
programmed to cover a memory (or I/O) address range then an
access to a memory (or I/O) address in that range is automatically
re-directed to the non-default bus ie. STEbus if the PC/104 is the
default bus or PC/104 if STEbus is the default. Using these chip
selects then gives the user the ability to mix PC/104 boards and
STEbus boards in the address map of the TARGET386EX
transparently to the application code.
By using registers within the 386EX processor the address ranges
used for the various on-board memory and I/O peripherals can be
changed. This means that if the default on-board area of any on-
board device conflicts with a device on the STEbus or the PC/104
bus then the chip select that controls that device can be re-
programmed to move the Flash ROM in the memory map. For
example, the default size of the Flash ROM is 512KB. If a PC/104
peripheral needs to exist in the address range A0000H to C7FFFH
then the start address of the Flash ROM could be re-programmed to
C8000H with the end address kept to FFFFFH. This reduces the size
of the Flash ROM available but the PC/104 device has been easily
accommodated into the TARGET386EX memory map.
Programming the 386EX chip selects is fully supported in the C
board library supplied with the board.
2192-08270-000-000
Appendix C. Reference
J539 TARGET386EX
Page 37
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