126
*RST
Reset the instrument to original power on configuration. Does not clear Enable
register for Standard Summary Status or Standard Event Registers. Does not
clear the output queue. Does not clear the power-on-status-clear flag.
*TST?
Performs a self test of the instrument data memory. Returns 0 if it is successful or
1 if the test fails.
*CLS
Clears the Status Byte summary register and event registers. Does not clear the
Enable registers.
*OPC
Sets the operation complete bit (bit 0) in the Standard Event register after a
command is completed successfully.
*OPC?
Returns an ASCII “1” after the command is executed.
*WAI
After the command is executed, it prevents the instrument from executing any
further query or commands until the no-operation-pending flag is TRUE.
*ESR?
Queries the Standard Event register. Returns the decimal value of the binary-
weighted sum of bits.
*ESE <value>
Standard Event enable register controls which bits will be logically O
R’d together
to generate the Event Summary bit 5 (ESB) within the Status Byte.
*ESE?
Queries the Standard Event enable register. Returns the decimal value of the
binary-weighted sum of bits.
*STB?
Read the Status Byte. Returns the decimal value of the binary-weighted sum of
bits.
*SRE <value>
Service Request enable register controls which bits from the Status Byte should
Summary of Contents for 00310XAC
Page 16: ...10 310XAC 320XAC...
Page 24: ...18 Accuracy L 0 1 Hz 0 0 500 Hz H 0 2 Hz 501 1000 Hz...
Page 26: ...20 A...
Page 36: ...30...
Page 101: ...95 move back to the test screen...
Page 108: ...102...
Page 127: ...121 CONNECT CONNECT 0 1 0 1...
Page 130: ...124 Register...
Page 138: ...132...