AMD RX881 Data Book Download

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AMD RX881 Databook

Technical Reference Manual

Rev 1.40

P/N: 46136_rx881_ds_pub_1.40

Summary of Contents for RX881

Page 1: ...AMD RX881 Databook Technical Reference Manual Rev 1 40 P N 46136_rx881_ds_pub_1 40 2011 Advanced Micro Devices Inc...

Page 2: ...lication and reserves the right to make changes to specifications and product descriptions at any time without notice No license whether express implied arising by estoppel or otherwise to any intelle...

Page 3: ...breviations 1 4 Chapter 2 Functional Descriptions 2 1 Host Interface 2 1 2 2 Clock Generation 2 3 Chapter 3 Pin Descriptions and Strap Options 3 1 RX881 Pin Assignment Top View 3 2 3 2 Interface Block...

Page 4: ...5 6 5 3 3 Board Solder Reflow Process Recommendations 5 7 Chapter 6 Power Management and ACPI 6 1 ACPI Power Management Implementation 6 1 Chapter 7 Testability 7 1 Test Capability Features 7 1 7 2 T...

Page 5: ...gure 3 2 RX881 Pin Assignment Top View Right 3 3 Figure 3 3 RX881 Interface Block Diagram 3 4 Figure 4 1 RX881 Power Rail Power up Sequence 4 2 Figure 5 1 RX881 528 Pin FCBGA Package Outline 5 5 Figur...

Page 6: ...AMD RX881 Databook 1 40 2011 Advanced Micro Devices Inc List of Figures 2 Proprietary List of Figures This page is left blank intentionally...

Page 7: ...1 3 10 Table 4 1 Timing Requirements for HyperTransport Reference Clock 100MHz Output by the Clock Generator 4 1 Table 4 2 PCI Express Differential Clock GFX_REFCLK GPPSB_REFCLK 100MHz AC Characterist...

Page 8: ...AMD RX881 Databook 1 40 2011 Advanced Micro Devices Inc List of Tables 2 Proprietary List of Tables This page intentionally left blank...

Page 9: ...nted by the advanced I O features of AMD s SB700 and SB800 series Southbridges Low Power Consumption and Industry Leading Power Management The RX881 is manufactured using the power efficient nm techno...

Page 10: ...ables clocks only to active functional blocks and is completely transparent to software Support for Cool n Quiet via FID VID change Support for AMD PowerNow Clocks to every major functional block are...

Page 11: ...t Handler Utility where appropriate Extensive power management support Supports AMD OverDrive utility Warning AMD and ATI processors are intendedto be operated only within their associated specificati...

Page 12: ...ecifying their integers in square brackets and with colons i e GFX_TX 7 0 P A similar short hand notation is used to indicate bit occupation in a register For example NB_COMMAND 15 10 refers to the bi...

Page 13: ...up a system or expansion card BIST Built In Self Test CSP Chip Scale Package DBI Dynamic Bus Inversion DFP Digital Flat Panel Monitor connection standard from VESA DPM Defects per Million EPROM Erasab...

Page 14: ...46136 AMD RX881 Databook 1 40 2011 Advanced Micro Devices Inc 1 6 Proprietary Conventions and Notations This page is left blank intentionally...

Page 15: ...cessors through the HyperTransportTM interface This section presents an overview of the HyperTransport interface For a detailed description of the interface please refer to the HyperTransport I O Link...

Page 16: ...t sequences and information packet flow controls The protocol layer is responsible for maintaining strict ordering rules defined by the HT protocol The RX881 HyperTransport bus interface consists of e...

Page 17: ...e Signals 2 2 Clock Generation The RX881 provides support for an external clock chip to generate PCIe and A Link Express II clocks HT_RXCADN 2 2 RX881 CPU HT_RXCADP HT_RXCTLN HT_RXCTLP HT_RXCLKN HT_RX...

Page 18: ...46136 AMD RX881 Databook 1 40 2011 Advanced Micro Devices Inc 2 4 Proprietary Clock Generation This page is left blank intentionally...

Page 19: ...page 3 2 Interface Block Diagram on page 3 4 CPU HyperTransport Interface on page 3 5 PCI Express Interfaces on page 3 5 1 x 16 Lane Interface for External Graphics on page 3 5 A Link Express II Inter...

Page 20: ...N VDDPCIE VDDA18PCIE VDDC VSS M GFX_TX13P GFX_TX13N GFX_TX12N GFX_TX12P GFX_RX11N VSSAPCIE GFX_RX10N GFX_RX9P VDDPCIE VDDA18PCIE VSS VDDC VDDC N GFX_TX14N GFX_TX14P VSSAPCIE VDDC VSS P GFX_TX15P GFX_T...

Page 21: ...DDHT VDDHTTX HT_TXCAD15N HT_TXCAD13P VSSAHT HT_TXCAD14P HT_RXCTL0P HT_RXCTL0N HT_TXCTL0P HT_TXCTL0N M VDDC VSSAHT HT_RXCAD7P HT_RXCAD7N N VDDC VSS VDDHT VDDHTTX HT_TXCAD15P HT_TXCTL1P VSSAHT HT_TXCAD1...

Page 22: ...15 0 P GFX_RX 15 0 N AVSSQ TESTMODE THERMALDIDOE_N SYSRESET POWERGOOD VDDLT33 VDDC PLLVSS THERMALDIODE_P HyperTransport Interface A Link Express II Interface Power Management Interface Misc Signals P...

Page 23: ...different clock signal Data is transferred on each clock edge HT_TXCTL 1 0 P HT_TXCTL 1 0 N O VDDHTTX VSS Transmitter Control Differential Pairs Forwarded clock signal For distinguishing control pack...

Page 24: ...riate value Table 3 6 Clock Interface Pin Name Type Power Domain Ground Domain Integrated Termination Functional Description HT_REFCLKP HT_REFCLKN I VDDA18H TPLL VSSAHT HyperTransport 100MHz reference...

Page 25: ...nal High means all power planes are valid It is not observed internally until it has been high for more than six consecutive REFCLK cycles The rising edge of this signal is deglitched Table 3 8 Miscel...

Page 26: ...V 2 AD11 AE11 Connect these pins ground VDDA18HTPLL 1 8V 1 H17 I O power for HyperTransport PLL VDDA18PCIE 1 8V 15 AA9 AB9 AD9 AE9 H9 J10 K10 L10 M10 P10 R10 T10 U10 W9 Y9 1 8V I O power for PCIe grap...

Page 27: ...h resistors During reset the strap pins are undriven allowing the external pull up or pull down to pull a pin to 0 or 1 The values on the strap pins are then latched into the device and used as operat...

Page 28: ...LOAD_EEPROM_STRAPS SUS_STAT Selects loading of strap values from EEPROM 0 I2C master can load strap values from EEPROM if connected or use default values if EEPROM is not connected Please refer to RX8...

Page 29: ...n and AMD Family 10h Processor Reference Clock Parameters order 34864 1 Single ended measurement at crossing point Value is maximum minimum over all time DC value of common mode is not important due t...

Page 30: ...9 847 10 203 ns TCCJITTER Cycle to Cycle Jitter 150 Ps Duty Cycle Duty Cycle 40 60 Rise Fall Matching Rising edge rate REFCLK to falling edge rate REFCLK matching 20 Table 4 3 RX881 Power Rail Power u...

Page 31: ...r HyperTransport receive interface VDDHTTX 1 14 1 2 1 26 V I O power for HyperTransport transmit interface VDDPCIE 1 045 1 1 1 155 V Main I O power for PCIe graphics SB and GPP interfaces Note Numbers...

Page 32: ...Description Minimum Typical Maximum VIL Input Low Voltage 0 0V 300mV VIH Input High Voltage 1 62V 1 8V 1 98V Symbol Description Minimum Maximum Unit VIL Differential Input Low Voltage 150 mV VIH Diff...

Page 33: ...ality of the chip is qualified 2 The maximum absolute rated junction temperature is the junction temperature at which the device can operate without causing damage to the ASIC This temperature can be...

Page 34: ...ltage readings one using current I and the other using current N x I N Ratio of the two thermal diode currents 10 when using an ADI thermal sensor e g ADM 1020 1030 Ideality factor of the diode K Bolt...

Page 35: ...ball arrangement for the RX881 Figure 5 1 RX881 528 Pin FCBGA Package Outline Table 5 6 RX881 528 Pin FCBGA Package Physical Dimensions Ref Min mm Typical mm Max mm c 0 48 0 58 0 68 A 1 69 1 84 1 99 A...

Page 36: ...nd the die does not exceed 6 lbf Note that a total load of 4 6 lbf is adequate to secure the thermal management device and achieve the lowest thermal contact resistance with a temperature drop across...

Page 37: ...aste Pads on PCB 5 3 3 2 Reflow Profile A reference reflow profile is given below Please note the following when using RoHS lead free solder SAC105 305 405 Tin Silver Cu The final reflow temperature p...

Page 38: ...405 Tin Silver Copper Reflow Profile Table 5 7 Recommended Board Solder Reflow Profile RoHS Lead Free Solder Profiling Stage Temperature Process Range Overall Preheat Room temp to 220 C 2 mins to 4 m...

Page 39: ...CPU Halt state No instructions are executed This state has the lowest latency on resume and contributes minimum power savings S0 C2 Stop Grant Caches Snoopable Stop Grant or Cache Snoopable CPU state...

Page 40: ...46136 AMD RX881 Databook 1 40 2011 Advanced Micro Devices Inc 6 2 Proprietary ACPI Power Management Implementation This page is left blank intentionally...

Page 41: ...valuation and characterization of these modules A JTAG test mode which is not entirely compliant to the IEEE 1149 1 standard to allow board level testing of neighboring devices An XOR TREE test mode o...

Page 42: ...commended for the XOR TREE test mode A pair of differential clock at 10MHz should also be supplied to HT_REFCLKP N to enable I Os for testing 7 3 4 XOR Tree for the RX881 The XOR start signal is appli...

Page 43: ...HT_RXCTL0P N M22 M23 18 HT_RXCTL1P N R21 R20 19 NC AB18 20 NC AB13 21 NC V14 22 NC AD18 23 NC W12 24 NC Y12 25 NC AD16 26 NC AE17 27 NC AD17 28 NC AB12 29 NC AE16 30 NC V11 31 NC AE15 32 NC AA12 33 N...

Page 44: ...e 7 2 71 GFX_RX8P N L5 L6 72 GFX_RX9P N M8 L8 73 GFX_RX10P N P7 M7 74 GFX_RX11P N P5 M5 75 GFX_RX12P N R8 P8 76 GFX_RX13P N R6 R5 77 GFX_RX14P N P4 P3 78 GFX_RX15P N T4 T3 79 GPP_RX0P N AE3 AD4 80 GPP...

Page 45: ...lock to the REFCLK_P pin and a 10MHz differential clock pair to the HT_REFCLKP N pins to enable I Os for testing 2 Set POWERGOOD to 0 3 Set TESTMODE to 1 4 Set NC ball E8 to 0 5 Load JTAG instruction...

Page 46: ...OH VOL Pin List Table 7 5 shows the RX881 VOH VOL tree There is no specific order for connection Under the Control column an ODD or EVEN indicates that the logical output of the pin is same as the TES...

Page 47: ...d 21 NC AA19 Even 22 NC Y19 Odd 23 NC V17 Even 24 NC AA17 Odd 25 NC AA15 Even 26 NC Y15 Odd 27 NC AC20 Even 28 NC AD19 Odd 29 NC AE22 Even 30 NC AC18 Odd 31 NC AB20 Even 32 NC AD22 Odd 33 NC AC22 Even...

Page 48: ...GFX_TX14P N N2 N1 Even 78 GFX_TX15P N P1 P2 Odd 79 GPP_TX0P N AC1 AC2 Even 80 GPP_TX1P N AB4 AB3 Odd 81 GPP_TX2P N AA2 AA1 Even 82 GPP_TX3P N Y1 Y2 Odd 83 GPP_TX4P N Y4 Y3 Even 84 GPP_TX5P N V1 V2 Odd...

Page 49: ...y A 1 Appendix A Pin Listings This appendix contains pin listings for the RX881 sorted in different ways To go to the listing of interest use the linked cross references below RX881 Pin List Sorted by...

Page 50: ...B12 NC AB13 NC AB14 NC AB15 VSS AB16 NC AB17 VSS AB18 NC AB19 VSS AB2 VSSAPCIE AB20 NC AB21 VSS AB22 VDDHTTX AB23 HT_RXCLK1P AB24 HT_RXCAD9N AB25 HT_RXCAD9P AB3 GPP_TX1N AB4 GPP_TX1P AB5 VSSAPCIE AB6...

Page 51: ...S D12 SUS_STAT D13 TESTMODE D14 PLLVDD18 D15 VSSLT D16 NC D17 NC D18 NC D19 NC D2 GFX_TX3N D20 NC D21 NC D22 VDDHTRX D23 VSSAHT D24 HT_TXCAD0P D25 HT_TXCAD0N D3 VSSAPCIE D4 GFX_RX0P D5 VSSAPCIE D6 VDD...

Page 52: ...VDDHT K17 HT_TXCAD11N K2 GFX_TX11N K22 HT_TXCAD7N K23 HT_TXCAD7P K24 HT_TXCAD6P K25 HT_TXCAD6N K3 GFX_TX10N K4 GFX_TX10P K9 VDDPCIE L1 VSSAPCIE L10 VDDA18PCIE L11 VDDC L12 VSS L14 VDDC L15 VSS L16 VDD...

Page 53: ...FCLKP U10 VDDA18PCIE U11 VSS U12 VDDC U14 VSS U15 VSS U16 VDDC U17 VDDHTTX U18 HT_RXCAD15N U19 HT_RXCAD15P U2 GPP_REFCLKN U20 HT_RXCAD14P U21 HT_RXCAD14N U22 VSSAHT U24 HT_RXCAD3P U25 HT_RXCAD3N U4 VS...

Page 54: ...46136 AMD RX881 Databook 1 40 2011 Advanced Micro Devices Inc A 6 Proprietary Pin Listings Y4 GPP_TX4P Y5 SB_RX3N Y6 VSSAPCIE Y7 SB_RX1N Y8 SB_RX0N Y9 VDDA18PCIE Ball Ref Pin Name...

Page 55: ...4 GFX_TX13N M2 GFX_TX13P M1 GFX_TX14N N1 GFX_TX14P N2 GFX_TX15N P2 GFX_TX15P P1 GFX_TX1N B4 GFX_TX1P A4 GFX_TX2N B2 GFX_TX2P C3 GFX_TX3N D2 GFX_TX3P D1 GFX_TX4N E1 GFX_TX4P E2 GFX_TX5N F3 GFX_TX5P F4...

Page 56: ...XCAD2P F24 HT_TXCAD3N F22 Pin Name Ball Ref HT_TXCAD3P F23 HT_TXCAD4N H22 HT_TXCAD4P H23 HT_TXCAD5N J24 HT_TXCAD5P J25 HT_TXCAD6N K25 HT_TXCAD6P K24 HT_TXCAD7N K22 HT_TXCAD7P K23 HT_TXCAD8N G21 HT_TXC...

Page 57: ...AA11 VDD_MEM AB10 VDD_MEM AC10 VDD_MEM AD10 VDD_MEM AE10 VDD_MEM Y11 VDD18 F9 VDD18 G9 VDD18_MEM AD11 VDD18_MEM AE11 VDD33 H11 VDD33 H12 VDDA18HTPLL H17 VDDA18PCIE AA9 VDDA18PCIE AB9 VDDA18PCIE AD9 VD...

Page 58: ...U14 VSS U15 VSS V12 VSS W11 VSS W15 VSS Y18 VSSAHT A25 VSSAHT AD25 VSSAHT D23 VSSAHT E22 VSSAHT G22 VSSAHT G24 VSSAHT G25 VSSAHT H19 VSSAHT H20 VSSAHT J22 VSSAHT L17 VSSAHT L22 VSSAHT L24 VSSAHT L25...

Page 59: ...Pin Listings 2011 Advanced Micro Devices Inc 46136 AMD RX881 Databook 1 40 Proprietary A 11 VSSLT C16 VSSLT C18 VSSLT C20 VSSLT C22 VSSLT D15 VSSLT E20 VSSLTP18 B13 Pin Name Ball Ref...

Page 60: ...46136 AMD RX881 Databook 1 40 2011 Advanced Micro Devices Inc A 12 Proprietary Pin Listings This page is left blank intentionally...

Page 61: ...icro Devices Inc 46136 AMD RX881 Databook 1 40 Proprietary B 1 Appendix B Revision History Rev 1 30 Nov 2010 First release of the public version Rev 1 40 Aug 2011 Updated Figure 1 1 RX881 ASIC A11 Pro...

Page 62: ...46136 AMD RX881 Databook 1 40 2011 Advanced Micro Devices Inc B 2 Proprietary Revision History This page intentionally left blank...

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