22007E/0—November 1999
AMD Athlon™ Processor x86 Code Optimization
Ensure All FPU Data is Aligned
97
9
Floating-Point Optimizations
T h i s c h a p t e r d e t a i l s t h e m e t h o d s u s e d t o o p t i m i z e
floating-point code to the pipelined floating-point unit (FPU).
Guidelines are listed in order of importance.
Ensure All FPU Data is Aligned
As discussed in “Memory Size and Alignment Issues” on page
45, floating-point data should be naturally aligned. That is,
words should be aligned on word boundaries, doublewords on
d o u b l ewo rd b o u n d a r i e s , a n d q u a dwo rd s o n q u a dwo rd
boundaries. Misaligned memory accesses reduce the available
memory bandwidth.
Use Multiplies Rather than Divides
If accuracy requirements allow, floating-point division by a
constant should be converted to a multiply by the reciprocal.
Divisors that are powers of two and their reciprocal are exactly
representable, except in the rare case that the reciprocal
overflows or underflows, and therefore does not cause an
accuracy issue. Unless such an overflow or underflow occurs, a
division by a power of two should always be converted to a
m u l t i p ly. A l t h o u g h t h e A M D A t h l o n ™ p ro c e s s o r h a s
high-performance division, multiplies are significantly faster
than divides.
Summary of Contents for Athlon Processor x86
Page 1: ...AMD Athlon Processor x86 Code Optimization Guide TM...
Page 12: ...xii List of Figures AMD Athlon Processor x86 Code Optimization 22007E 0 November 1999...
Page 16: ...xvi Revision History AMD Athlon Processor x86 Code Optimization 22007E 0 November 1999...
Page 202: ...186 Page Attribute Table PAT AMD Athlon Processor x86 Code Optimization 22007E 0 November 1999...
Page 252: ...236 VectorPath Instructions AMD Athlon Processor x86 Code Optimization 22007E 0 November 1999...
Page 256: ...240 Index AMD Athlon Processor x86 Code Optimization 22007E 0 November 1999...