SERIES I/O SERVER MODULE
MIL-STD-1553A/B Bus Interface Module
________________________________________________________________________
8
Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:[email protected]
www.acromag.com
Table 3 5028-570 Cable 15 Pin DSUB pin assignments
Pin Description
Number
CH0_RT_ADDR0
1
CH0_RT_ADDR1
2
CH0_RT_ADDR2
3
CH0_RT_ADDR3
4
CH0_RT_ADDR4
5
CH0_RT_PARITY
6
GND
7
TAG_CLOCK_IN
8
CH1_RT_ADDR0
9
CH1_RT_ADDR1
10
CH1_RT_ADDR2
11
CH1_RT_ADDR3
12
CH1_RT_ADDR4
13
CH1_RT_PARITY
14
TAG_CLOCK_OUT
15
Non-Isolation Considerations
The board is non-isolated, since there is electrical continuity between the logic and field I/O
grounds. As such, the field I/O connections are not isolated from the system. Care should
be taken in designing installations without isolation to avoid noise pickup and ground loops
caused by multiple ground connections.
PROGRAMMING INFORMATION
This Section provides the specific information necessary to program and operate the board.
IDENTIFICATION PROM
Each IOS module contains identification (ID) information that resides in the ID address
space. This area of memory contains 32 bytes of information at most. Both fixed and
variable information may be present within the ID space. Fixed information includes the
"IPAH" identifier, model number, and manufacturer's identification codes. Variable
information includes unique information required for the module. The IOS-57x ID
information does not contain any variable (e.g. unique calibration) information. ID space
bytes are a
ddressed using only the odd addresses in a 64 byte block (on the “Big Endian”
VMEbus). Even addresses are used on the “Little Endian” PC PCI bus. The IOS-57x ID
space contents are shown in Table 4. Note that the base-address for the IOS module ID
space (see your carrier board instructions) must be added to the addresses shown to
properly access the ID space. Execution of an ID space read requires 1 wait state.
