272
MC96F6432A
ABOV Semiconductor Co., Ltd.
BRANCHING
Mnemonic
Description
Bytes
Cycles
Hex code
ACALL addr 11
Absolute jump to subroutine
2
2
11
→F1
LCALL addr 16
Long jump to subroutine
3
2
12
RET
Return from subroutine
1
2
22
RETI
Return from interrupt
1
2
32
AJMP addr 11
Absolute jump unconditional
2
2
01
→E1
LJMP addr 16
Long jump unconditional
3
2
02
SJMP rel
Short jump (relative address)
2
2
80
JC rel
Jump on carry = 1
2
2
40
JNC rel
Jump on carry = 0
2
2
50
JB bit, rel
Jump on direct bit = 1
3
2
20
JNB bit, rel
Jump on direct bit = 0
3
2
30
JBC bit, rel
Jump on direct bit = 1 and clear
3
2
10
JMP @A+DPTR
Jump indirect relative DPTR
1
2
73
JZ rel
Jump on accumulator = 0
2
2
60
JNZ rel
Jump on accumulator
≠0
2
2
70
CJNE A, dir, rel
Compare A, direct jne relative
3
2
B5
CJNE A, #d, rel
Compare A, immediate jne relative
3
2
B4
CJNE Rn, #d, rel
Compare register, immediate jne relative
3
2
B8-BF
CJNE @Ri, #d, rel
Compare indirect, immediate jne relative
3
2
B6-B7
DJNZ Rn, rel
Decrement register, jnz relative
2
2
D8-DF
DJNZ dir, rel
Decrement direct byte, jnz relative
3
2
D5
MISCELLANEOUS
Mnemonic
Description
Bytes
Cycles
Hex code
NOP
No operation
1
1
00
ADDITIONAL INSTRUCTIONS (selected through EO[7:4])
Mnemonic
Description
Bytes
Cycles
Hex code
MOVC @(DPTR++), A
M8051W/M8051EW-specific instruction supporting
software download into program memory
1
2
A5
TRAP
Software break command
1
1
A5
In the above table, an entry such as E8-EF indicates a continuous block of hex opcodes used for 8 different registers,
the register numbers of which are defined by the lowest three bits of the corresponding code. Non-continuous blocks
of codes, shown as 11
→
F1 (for example), are used for absolute jumps and calls, with the top 3 bits of the code being
used to store the top three bits of the destination address.
The CJNE instructions use the abbreviation #d for immediate data; other instructions use #data.
Summary of Contents for MC96F6432A
Page 16: ...16 MC96F6432A ABOV Semiconductor Co Ltd 4 Package Diagram Figure 4 1 48 Pin QFN Package ...
Page 17: ...17 MC96F6432A ABOV Semiconductor Co Ltd Figure 4 2 44 Pin MQFP Package ...
Page 18: ...18 MC96F6432A ABOV Semiconductor Co Ltd Figure 4 3 32 Pin LQFP Package ...
Page 19: ...19 MC96F6432A ABOV Semiconductor Co Ltd Figure 4 4 32 Pin SOP Package ...
Page 20: ...20 MC96F6432A ABOV Semiconductor Co Ltd Figure 4 5 28 Pin SOP Package ...
