Abov MC96F6432A, User Manual

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MC96F6432A ABOV Semiconductor Co., Ltd.
11.11 12-bit A/D Converter
11.11.1 Overview
The analog-to-digital converter (A/D) allows conversion of an analog input signal to corresponding 12-bit digital value.
The A/D module has eight analog inputs. The output of the multiplexer is the input into the converter which generates
the result through successive approximation. The A/D module has four registers which are the A/D converter control
high register (ADCCRH), A/D converter control low register (ADCCRL),A/D converter data high register (ADCDRH)
and A/D converter data low register (ADCDRL). The channels to be converted are selected by setting ADSEL[3:0]. To
execute A/D conversion, TRIG[2:0] bits should be set to
‘xxx’. The register ADCDRH and ADCDRL contains the results
of the A/D conversion. When the conversion is completed, the result is loaded into the ADCDRH and ADCDRL, the
A/D conversion status bit AFLAG is set to
‘1’ and the A/D interrupt is set. During A/D conversion, AFLAG bit is read as
‘0’.
11.11.2 Conversion Timing
The A/D conversion process requires 4 steps (4 clock edges) to convert each bit and 10 clocks to set up A/D
conversion. Therefore, total of 58 clocks are required to complete a 12-bit conversion: When fxx/8 is selected for
conversion clock with a 8MHz fxx clock frequency, one clock cycle is 1
μ
s. Each bit conversion requires 4 clocks, the
conversion rate is calculated as follows:
4 clocks/bit
×
12 bits + set-up time = 58 clocks,
58 clock
×
1us = 58us at 1MHz (8MHz/8)
NOTE)
1. The A/D converter needs at least 20us for conversion time. So you must set the conversion time more
than 20us.