A96G166/A96A166/A96S166 User’s manual
4. Memory organization
27
FFFFH
0000H
16K Bytes
3FFFH
NOTE
: The 16Kbytes includes the Interrupt Vector Region
.
Figure 11. Program Memory Map
4.2
Data memory
Internal data memory space is divided into three blocks, which are generally referred to as lower
128bytes, upper 128bytes, and SFR space. Internal data memory addresses are always one byte
wide, which implies an address space of 256bytes. In fact, the addressing modes for the internal data
memory can accommodate up to 384bytes by using a simple trick. Direct addresses higher than 7FH
access one memory space, while indirect addresses higher than 7FH access a different memory
space. Thus as shown in Figure 12, the upper 128bytes and SFR space occupy the same block of
addresses, 80H through FFH, although they are physically separate entities.
The lower 128bytes of RAM are present in all 8051 devices as mapped in Figure 13. The lowest
32bytes are grouped into 4 banks of 8 registers. Program instructions call out these registers as R0
through R7. Two bits in the Program Status Word select which register bank is in use. This allows
more efficient use of code space, since register instructions are shorter than instructions that use
direct addressing.
The next 16bytes above the register banks form a block of bit-addressable memory space. The 8051
instruction set includes a wide selection of single-bit instructions, and the 128 bits in this area can be
directly addressed by these instructions. The bit addresses in this area are 00H through 7FH.
All of the bytes in the lower 128bytes can be accessed by either direct or indirect addressing. The
upper 128bytes of RAM can only be accessed by indirect addressing. These spaces are used for data
RAM and stack.