15. USART 0/1
A96G166/A96A166/A96S166 User’s manual
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15.7.2
Transmitter flag and interrupt
USART transmitter has 2 flags which indicate its state. One is USART Data Register Empty (UDRE)
and the other is Transmit Complete (TXC). Both flags can be used as interrupt sources.
UDRE flag indicates whether the transmit buffer is ready to be loaded with new data. This bit is set
when the transmit buffer is empty and cleared when the transmit buffer contains transmission data
which has not yet been moved into the shift register. And also this flag can be cleared by writing ‘0’ to
this bit position. Writing ‘1’ to this bit position is not valid.
When the Data Register Empty Interrupt Enable (UDRIE) bit in UnCTRL2 register is set and the
Global Interrupt is enabled, USART Data Register Empty Interrupt is generated while UDRE flag is
set.
Transmit Complete (TXC) flag bit is set when the entire frame in the transmit shift register has been
shifted out and there are no more data in the transmit buffer. The TXC flag is automatically cleared
when the Transmit Complete Interrupt service routine is executed, or it can be cleared by writing ‘0’ to
TXC bit in USTAT register.
When the Transmit Complete Interrupt Enable (TXCIE) bit in UnCTRL2 register is set and the Global
Interrupt is enabled, USART Transmit Complete Interrupt is generated while TXC flag is set.
15.7.3
Parity generator
Parity Generator calculates the parity bit for the sending serial frame data. When parity bit is enabled
(UPM[1] = 1), the transmitter control logic inserts the parity bit between the bits and the first stop bit of
the sending frame.
15.7.4
Disabling transmitter
Disabling the Transmitter by clearing the TXE bit will not become effective until ongoing transmission
is completed. When the Transmitter is disabled, the TXDn pin is used as normal General Purpose I/O
(GPIO) or primary function pin.
15.8
USART receiver
The USART Receiver is enabled by setting the RXE bit in the UnCTRL1 register. When the Receiver
is enabled, the normal pin operation of the RXDn pin is overridden by the USART as the serial input
pin of the Receiver. The baud-rate, mode of operation and frame format must be set before serial
reception. If synchronous or SPI operation is used, the clock on the XCKn pin will be used as transfer
clock. If USART operates in SPI mode, SSn pin is used as SSn input pin in slave mode or can be
configured as SSn output pin in master mode. This can be done by setting SPISS bit in UnCTRL3
register.