Abov A96G166, User Manual, Page: 102 / 247

11. Timer 0/1/2 A96G166/A96A166/A96S166 User’s manual
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11.2.6 Register map
Table 18. TIMER 1 Register Map
Name Address Direction Default Description
T1CRL BAH R/W 00H Timer 1 Control Low Register
T1CRH BBH R/W 00H Timer 1 Control High Register
T1ADRL BCH R/W FFH Timer 1 A Data Low Register
T1ADRH BDH R/W FFH Timer 1 A Data High Register
T1BDRL BEH R/W FFH Timer 1 B Data Low Register
T1BDRH BFH R/W FFH Timer 1 B Data High Register
T1CDRL D9H R/W FFH Timer 1 C Data Low Register
T1CDRH DAH R/W FFH Timer 1 C Data High Register
T1DDRL DBH R/W FFH Timer 1 D Data Low Register
T1DDRH DCH R/W FFH Timer 1 D Data High Register
11.2.7 Register description
T1ADRH (Timer 1 A data High Register): BDH
7 6 5 4 3 2 1 0
T1ADRH7 T1ADRH6 T1ADRH5 T1ADRH4 T1ADRH3 T1ADRH2 T1ADRH1 T1ADRH0
R/W R/W R/W R/W R/W R/W R/W R/W
Initial value: FFH
T1ADRH[7:0] T1 A Data High Byte
T1ADRL (Timer 1 A Data Low Register): BCH
7 6 5 4 3 2 1 0
T1ADRL7 T1ADRL6 T1ADRL5 T1ADRL4 T1ADRL3 T1ADRL2 T1ADRL1 T1ADRL0
R/W R/W R/W R/W R/W R/W R/W R/W
Initial value: FFH
T1ADRL[7:0] T1 A Data Low Byte
NOTE: Do not write
“0000H” in the T1ADRH/T1ADRL register
when PPG mode
T1BDRH (Timer 1 B Data High Register): BFH
7 6 5 4 3 2 1 0
T1BDRH7 T1BDRH6 T1BDRH5 T1BDRH4 T1BDRH3 T1BDRH2 T1BDRH1 T1BDRH0
R/W R/W R/W R/W R/W R/W R/W R/W
Initial value: FFH
T1BDRH[7:0] T1 B Data High Byte