abaco systems FM680, User Manual

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FM680 User Manual r1.7
FM680 www.abaco.com Page 4 of 32
Acronyms and related documents
1 Acronyms
ADC Analog to Digital Converter
DAC Digital to Analog Converter
DCI Digitally Controlled Impedance
DDR Double Data Rate
DSP Digital Signal Processing
EPROM Erasable Programmable Read-Only Memory
FBGA Fineline Ball Grid Array
FPDP Front Panel Data Port
FPGA Field Programmable Gate Array
JTAG Joint Test Action Group
LED Light Emitting Diode
LVTTL Low Voltage Transistor Logic level
LVDS Low Differential Data Signaling
LSB Least Significant Bit(s)
LVDS Low Voltage Differential Signaling
MGT Multi-Gigabit Transceiver
MSB Most Significant Bit(s)
PCB Printed Circuit Board
PCI Peripheral Component Interconnect
PCI-e PCI Express
PLL Phase Locked Loop
PMC PCI Mezzanine Card
QDR Quadruple Data rate
SDRAM Synchronous Dynamic Random Access memory
SRAM Synchronous Random Access memory
Table 1: Glossary
2 Related Documents
•
IEEE Std 1386.1-2001: IEEE Standard Physical and Environmental Layers for PCI
Mezzanine Cards (PMC).
•
ANSI/VITA 20-2001 : Conduction Cooled PMC.
•
ANSI/VITA 42.0-2005: XMC Switched Mezzanine Card Auxiliary Standard.
•
ANSI/VITA 42.3-2006: XMC PCI Express Protocol Layer Standard
•
IEEE Std 1386-2001: IEEE Standard for a Common Mezzanine Card (CMC) Family.
•
Xilinx Virtex-5 Documentation
•
Xilinx Virtex-6 Documentation